IP Library › Granted Patent US 11,894,250
Granted Patent B2
US 11,894,250 · App. 16/836,639 · Granted Feb 6, 2024

Method and system for recognizing and addressing plasma discharge during semiconductor processes

Inventor: Chih-Yu Wang (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L21/67253G06T1/0014G06T7/0004H01J37/32944H01L21/67017H01L21/67288G06T2207/10016G06T2207/20081H01J2237/24507
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Quick Facts
Patent No.
US 11,894,250
App. No.
16/836,639
Granted
Feb 6, 2024
Kind
B2
Abstract

A plasma discharge detection system detects undesirable plasma discharge events within a semiconductor process chamber. The plasma discharge detection system includes one or more cameras positioned around the semiconductor process chamber. The cameras capture images from within the semiconductor process chamber. The plasma discharge detection system includes a control system that receives the images from the cameras. The control system analyzes the images and detects plasma discharge within the semiconductor process chamber based on the images. The control system can adjust a semiconductor process in real time responsive to detecting the plasma discharge.

Claims (35)

1. A method comprising:

performing a plasma assisted process on a wafer within a semiconductor process chamber including a top electrode and the wafer positioned on a bottom electrode, wherein the plasma assisted process generates an anode glow region adjacent to the top electrode, a cathode glow region adjacent to the bottom electrode and a plasma region between the anode glow region and the cathode glow region;

capturing, while performing the plasma assisted process, images of plasma within the semiconductor process chamber with a plurality of groups of cameras positioned around the semiconductor process chamber from different angles and positions, each group including an infrared camera, a visible light camera, and an ultraviolet camera;

processing the images with a control system;

generating a 3D model of the plasma within the semiconductor process chamber based on the images;

detecting, during the plasma assisted process, arcing between the top electrode and the wafer through the anode glow region, the plasma region, and the cathode glow region within the semiconductor process chamber with the control system based on the 3D model;

determining a location of the arcing on the wafer within the semiconductor processing chamber based on the images and angles and positions of the plurality of groups of cameras; and

adjusting, with the control system, the plasma assisted process during the plasma assisted process responsive to detecting the arcing.

2. The method of claim 1 , wherein the capturing images includes:

capturing images in a visible light spectrum;

capturing images in an infrared spectrum; or

capturing images in an ultraviolet spectrum.

3. The method of claim 1 , wherein the capturing images includes capturing infrared images, wherein processing the images includes generating a thermal distribution based on the infrared images.

4. The method of claim 3 , further comprising detecting the arcing based on the thermal distribution.

5. The method of claim 1 , wherein detecting the arcing includes determining, with the control system, that the images correspond to characteristics of arcing.

6. The method of claim 1 , further comprising:

training an analysis model of the control system with a machine learning process to detect the arcing within the semiconductor process chamber; and

detecting arcing by analyzing the images with the analysis model.

7. A method, comprising:

performing a plasma assisted semiconductor process on a semiconductor wafer in a semiconductor process chamber including a top electrode and the semiconductor wafer positioned on a bottom electrode, wherein the plasma assisted process generates an anode glow region adjacent to the top electrode, a cathode glow region adjacent to the bottom electrode and a plasma region between the anode glow region and the cathode glow region;

capturing, with a plurality of groups of cameras positioned around the semiconductor process chamber from different angles and positions, a plurality of images of the semiconductor process chamber, each group including an infrared camera, a visible light camera and an ultraviolet camera;

generating a 3D model of the plasma within the semiconductor process chamber based on the images; detecting, during the plasma assisted semiconductor process with a control system communicatively coupled to the one or more cameras, arcing between the top electrode and the wafer through the anode glow region, the plasma region and the cathode glow region within the semiconductor process chamber based on the 3D model;

determining a location of the arcing on the semiconductor wafer within the semiconductor processing chamber based on the images and angles and positions of the cameras; and

adjusting the semiconductor process within the semiconductor process chamber during the plasma assisted semiconductor process responsive to detecting arcing within the semiconductor process chamber.

8. The method of claim 7 , comprising training an analysis model of the control system with a machine learning process to recognize the arcing based on the 3D model.

9. The method of claim 7 , comprising wirelessly transmitting the images to the control system.

10. The method of claim 7 , wherein adjusting the semiconductor process includes stopping the semiconductor process.

11. The method of claim 7 , wherein adjusting the semiconductor process includes adjusting a voltage.

12. The method of claim 7 , wherein adjusting the semiconductor process includes adjusting a flow rate of a fluid.

13. The method of claim 7 , wherein the capturing images includes:

capturing images in a visible light spectrum;

capturing images in an infrared spectrum; or

capturing images in an ultraviolet spectrum.

14. The method of claim 13 , wherein the capturing images includes capturing infrared images, wherein processing the images includes generating a thermal distribution based on the infrared images.

15. The method of claim 14 , further comprising detecting the arcing based on the thermal distribution.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2021
From: WANG, CHIH-YU
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 058511/0722 →
Continuity (1)
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