Header for semiconductor package, and semiconductor package
A header for a semiconductor package, includes an eyelet having an upper surface, and a lower surface on an opposite side from the upper surface, a metal block having a side surface, and configured to protrude from the upper surface of the eyelet, a lead sealed in a through hole which penetrates the eyelet from the upper surface to the lower surface of the eyelet, and a substrate having a front surface formed with a signal pattern electrically connected to the lead, and a back surface on an opposite side from the front surface. The back surface of the substrate is fixed to the side surface of the metal block. A portion of the back surface of the substrate is exposed from the metal block, and this portion of the substrate is formed with a ground pattern.
1. A header for a semiconductor package, comprising:
an eyelet having an upper surface, and a lower surface on an opposite side from the upper surface;
a first metal block having a first side surface, and configured to protrude from the upper surface of the eyelet;
a first lead sealed in a first through hole which penetrates the eyelet from the upper surface to the lower surface of the eyelet; and
a first substrate having a front surface formed with a first signal pattern electrically connected to the first lead, and a back surface on an opposite side from the front surface thereof, wherein
the back surface of the first substrate is fixed to the first side surface of the first metal block,
a first portion of the back surface of the first substrate is exposed from the first metal block at a position above an upper surface of the first metal block, and
the first portion of the first substrate is formed with a ground pattern.
2. The header for the semiconductor package as claimed in claim 1 , wherein a height of the upper surface of the first metal block with reference to the upper surface of the eyelet is lower than a height of an upper surface of the first substrate with reference to the upper surface of the eyelet.
3. The header for the semiconductor package as claimed in claim 2 , wherein the height of the upper surface of the first metal block with reference to the upper surface of the eyelet is ½ the height of the upper surface of the first substrate or greater with reference to the upper surface of the eyelet.
4. A header for the semiconductor package comprising:
an eyelet having an upper surface, and a lower surface on an opposite side from the upper surface;
a first metal block having a first side surface, and configured to protrude from the upper surface of the eyelet;
a first lead sealed in a first through hole which penetrates the eyelet from the upper surface to the lower surface of the eyelet;
a first substrate having a front surface formed with a first signal pattern electrically connected to the first lead, and a back surface on an opposite side from the front surface thereof,
a second metal block having a second side surface facing the same side as the first side surface, and protruding from the upper surface of the eyelet;
a second lead sealed in a second through hole which penetrates the eyelet from the upper surface to the lower surface of the eyelet; and
a second substrate having a front surface formed with a second signal pattern electrically connected to the second lead, and a back surface on an opposite side from the front surface thereof, wherein
the back surface of the first substrate is fixed to the first side surface of the first metal block,
a first portion of the back surface of the first substrate is exposed from the first metal block,
the first portion of the first substrate is formed with a ground pattern,
the back surface of the second substrate is fixed to the second side surface of the second metal block,
the first metal block and the second metal block are arranged at positions separated from each other,
a second portion of the back surface of the second substrate is exposed from the second metal block, and
the second portion of the second substrate is formed with a ground pattern.
5. The header for semiconductor package as claimed in claim 4 , wherein a height of an upper surface of the second metal block with reference to the upper surface of the eyelet is lower than a height of an upper surface of the second substrate with reference to the upper surface of the eyelet.
6. The header for semiconductor package as claimed in claim 5 , wherein the height of the upper surface of the second metal block with reference to the upper surface of the eyelet is ½ the height of the upper surface of the second substrate or greater with reference to the upper surface of the eyelet.
7. The header for the semiconductor package as claimed in claim 4 , wherein the first side surface and the second side surface are coplanar.
8. A semiconductor package comprising:
the header for the semiconductor package according to claim 4 ;
a Peltier device arranged on the upper surface of the eyelet;
a third metal block having a third side surface facing the same side as the first side surface and the second side surface, and arranged on the Peltier device; and
a third substrate having a front surface mounted with a light emitting device, and a back surface on an opposite side from the front surface thereof, wherein
the back surface of the third substrate is fixed to the third side surface of the third metal block,
a third portion of the back surface of the third substrate is exposed from the first substrate side of the third metal block,
a fourth portion of the back surface of the third substrate is exposed from the second substrate side of the third metal block,
the third portion and the fourth portion of the third substrate are formed with a ground pattern,
the first metal block and the third metal block are arranged at positions separated from each other,
the second metal block and the third metal block are arranged at positions separated from each other,
the ground pattern formed on the first portion of the first metal block, and the ground pattern formed on the third portion of the third metal block are electrically connected via a wiring member, and
the ground pattern formed on the second portion of the second metal block, and the ground pattern formed on the fourth portion of the third metal block are electrically connected via a wiring member.
9. The semiconductor package as claimed in claim 8 , wherein
the ground pattern formed on the first portion of the first metal block, and the ground pattern formed on the third portion of the third metal block are electrically connected via a plurality of wiring members, and
the ground pattern formed on the second portion of the second metal block, and the ground pattern formed on the fourth portion of the third metal block are electrically connected via a plurality of wiring members.
10. The semiconductor package as claimed in claim 8 , wherein the first substrate and the second substrate are formed of a material having a thermal conductivity lower than a thermal conductivity of the third substrate.
11. A semiconductor package comprising:
a header for the semiconductor package comprising:
an eyelet having an upper surface, and a lower surface on an opposite side from the upper surface;
a first metal block having a first side surface, and configured to protrude from the upper surface of the eyelet;
a first lead sealed in a first through hole which penetrates the eyelet from the upper surface to the lower surface of the eyelet; and
a first substrate having a front surface formed with a first signal pattern electrically connected to the first lead, and a back surface on an opposite side from the front surface thereof, wherein
the back surface of the first substrate is fixed to the first side surface of the first metal block,
a first portion of the back surface of the first substrate is exposed from the first metal block, and
the first portion of the first substrate is formed with a ground pattern;
a Peltier device arranged on the upper surface of the eyelet;
a third metal block having a third side surface facing the same side as the first side surface, and arranged on the Peltier device; and
a third substrate having a front surface mounted with a light emitting device, and a back surface on an opposite side from the front surface thereof, wherein
the back surface of the third substrate is fixed to the third side surface of the third metal block,
a third portion of the back surface of the third substrate is exposed from the third metal block,
the third portion of the third substrate is formed with a ground pattern,
the first metal block and the third metal block are arranged at positions separated from each other, and
the ground pattern formed on the first portion of the first metal block, and the ground pattern formed on the third portion of the third metal block are electrically connected via a wiring member.
12. The semiconductor package as claimed in claim 10 , wherein the first substrate and the second substrate are made of alumina, and the third substrate is made of aluminum nitride.