Magnetic tunnel junction device with minimum stray field
A second BEOL layer including a via dielectric layer surrounding a via including an upper metal stud and a lower metal stud separated by a liner, and a magnetic tunnel junction (MTJ) stack aligned above the via. A first back end of line (BEOL) layer including a BEOL dielectric layer surrounding a BEOL metal layer, a second BEOL layer including a via dielectric layer surrounding a via including an upper metal stud and a lower metal stud separated by a liner, a magnetic tunnel junction (MTJ) stack aligned above the via. Forming a via dielectric layer as a second back end of line (BEOL) layer, an opening, a lower metal stud in the opening, a liner on the lower metal stud and on exposed side surfaces of the opening, an upper metal stud in remaining portions of the opening, and forming a magnetic tunnel junction (MTJ) stack aligned above.
1. A semiconductor device comprising:
a via dielectric layer sandwiched between a metal line layer and a bottom electrode of a magnetic tunnel junction (MTJ) stack;
a via in the via dielectric layer, wherein the via comprises an upper metal stud and a lower metal stud, wherein the upper metal stud and the lower metal stud each comprise cobalt;
a liner surrounding a lower horizontal surface and vertical side surfaces of the upper metal stud, wherein the liner is sandwiched between the upper metal stud and the lower metal stud, wherein the liner comprises a non-ferromagnetic conductive material, wherein a thickness of the liner corresponds to a least amount of influence of a magnetic field through the non-ferromagnetic conductive material of the liner between the upper metal stud and the lower metal stud.
2. The semiconductor device according to claim 1 , wherein material of the liner is selected from the group consisting of ruthenium (Ru), chromium (Cr), tungsten (W), and combinations thereof.
3. The semiconductor device according to claim 1 , wherein the metal line layer comprises a metal line layer dielectric and a metal line, the metal line vertically aligned with the via.
4. A semiconductor device comprising:
a via between a metal line layer and a bottom electrode of a magnetic tunnel junction (MTJ) stack, wherein the via comprises an upper metal stud and a lower metal stud, wherein the upper metal stud and the lower metal stud each comprise cobalt;
a liner surrounding a lower horizontal surface and vertical side surfaces of the upper metal stud, wherein the liner is sandwiched between the upper metal stud and the lower metal stud, wherein the liner comprises a non-ferromagnetic conductive material, wherein a thickness of the liner corresponds to a least amount of influence of a magnetic field through the non-ferromagnetic conductive material of the liner between the upper metal stud and the lower metal stud.
5. The semiconductor device according to claim 4 , wherein material of the liner is selected from the group consisting of ruthenium (Ru), chromium (Cr), tungsten (W), and combinations thereof.
6. The semiconductor device according to claim 4 , wherein the metal line layer comprises a metal line layer dielectric and a metal line, the metal line vertically aligned with the via.
7. A semiconductor device comprising:
a bottom electrode of a magnetic tunnel junction (MTJ) stack;
a via vertically aligned below the bottom electrode, wherein the via comprises an upper metal stud and a lower metal stud, wherein the upper metal stud and the lower metal stud each comprise cobalt;
a liner surrounding a lower horizontal surface and vertical side surfaces of the upper metal stud, wherein the liner is sandwiched between the upper metal stud and the lower metal stud, wherein the liner comprises a non-ferromagnetic conductive material, wherein a thickness of the liner corresponds to a least amount of influence of a magnetic field through the non-ferromagnetic conductive material of the liner between the upper metal stud and the lower metal stud.
8. The semiconductor device according to claim 7 , wherein material of the liner is selected from the group consisting of ruthenium (Ru), chromium (Cr), tungsten (W), and combinations thereof.
9. The semiconductor device according to claim 7 , further comprising:
a metal line layer below the via, the metal line layer comprising a metal line layer dielectric and a metal line, the metal line vertically aligned with the via.