IP Library › Granted Patent US 11,948,909
Granted Patent B2
US 11,948,909 · App. 17/574,360 · Granted Apr 2, 2024

Package comprising spacers between integrated devices

Inventors: Yangyang Sun (San Diego, CA); Dongming He (San Diego, CA); Lily Zhao (San Diego, CA)
Assignee: QUALCOMM INCORPORATED
H01L24/73H01L24/26H01L24/32H01L24/92H01L25/0652H01L25/0657H01L25/18H01L25/50H01L24/05H01L24/06H01L24/13H01L24/16H01L24/29H01L24/30H01L24/33H01L2224/0557H01L2224/06181H01L2224/13082H01L2224/16148H01L2224/26125H01L2224/2919H01L2224/301H01L2224/32145H01L2224/33181H01L2224/73104H01L2224/73253H01L2224/9211H01L2225/06513H01L2225/06517H01L2225/0652H01L2225/06541H01L2225/06565
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Quick Facts
Patent No.
US 11,948,909
App. No.
17/574,360
Granted
Apr 2, 2024
Kind
B2
Abstract

A package that includes a first integrated device comprising a first plurality of interconnects; a plurality of solder interconnects coupled to the first plurality of interconnects; a second integrated device comprising a second plurality of interconnects, wherein the second integrated device is coupled to the first integrated device through the second plurality of interconnects, the plurality of solder interconnects and the first plurality of interconnects; a polymer layer located between the first integrated device and the second integrated device; and a plurality of spacer balls located between the first integrated device and the second integrated device.

Claims (62)

1. A package comprising:

a first integrated device comprising a first plurality of interconnects;

a plurality of solder interconnects coupled to the first plurality of interconnects;

a second integrated device comprising a second plurality of interconnects, wherein the second integrated device is coupled to the first integrated device through the second plurality of interconnects, the plurality of solder interconnects and the first plurality of interconnects;

a polymer layer located between the first integrated device and the second integrated device;

a plurality of spacer balls located between the first integrated device and the second integrated device; and

an underfill at least partially surrounding the plurality of solder interconnects;

wherein a portion of the polymer layer at least partially surrounds the plurality of spacer balls and is laterally adjacent to the underfill and in direct contact with the underfill.

2. The package of claim 1 , wherein the polymer layer comprises an adhesive layer.

3. The package of claim 1 , wherein the plurality of spacer balls includes particles that include mono-dispersed particles, silica, glass, polymer, ceramic, and/or metal.

4. The package of claim 1 , wherein the plurality of spacer balls includes polyethylene polymer particles.

5. The package of claim 1 , wherein the underfill is located between the first integrated device and the second integrated device.

6. The package of claim 1 , wherein a pitch between neighboring interconnects from the first plurality of interconnects is about 20 micrometers or less.

7. The package of claim 1 , wherein a pitch between neighboring solder interconnects from the plurality of solder interconnects is about 20 micrometers or less.

8. The package of claim 1 ,

wherein the first plurality of interconnects includes a first plurality of pillar interconnects, and

wherein the second integrated device is coupled to the first integrated device through the second plurality of interconnects, the plurality of solder interconnects and the first plurality of pillar interconnects.

9. The package of claim 1 ,

wherein the first integrated device includes a first die, and

wherein the second integrated device includes a second die.

10. The package of claim 1 ,

wherein the first integrated device includes a first memory die, and

wherein the second integrated device includes a logic die or a second memory die.

11. The package of claim 1 , further comprising:

a third integrated device comprising a third plurality of interconnects;

a second polymer layer located between the third integrated device and the second integrated device; and

a second plurality of spacer balls located between the third integrated device and the second integrated device.

12. The package of claim 11 , wherein the third integrated device is coupled to the second integrated device through the third plurality of interconnects and a second plurality of solder interconnects.

13. The package of claim 11 , wherein the second integrated device includes a plurality of through substrate vias.

14. The package of claim 1 ,

wherein the first plurality of interconnects includes a first plurality of pillar interconnects and/or a first plurality of pad interconnects, and

wherein the second plurality of interconnects includes a second plurality of pillar interconnects and/or a second plurality of pad interconnects.

15. The package of claim 1 ,

wherein the first integrated device includes a third plurality of interconnects,

wherein the first plurality of interconnects is located on a first surface of the first integrated device, and

wherein the third plurality of interconnects is located on a second surface of the first integrated device.

16. The package of claim 1 , wherein the package is incorporated in a device selected from a group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, an internet of things (IoT) device, and a device in an automotive vehicle.

17. The package of claim 1 , wherein the polymer layer forms a first side wall and the underfill forms a second side wall and the first side wall and the second side wall are in direct contact.

18. A package comprising:

a substrate; and

a stack of integrated devices coupled to the substrate through a first plurality of solder interconnects, wherein the stack of integrated devices comprises:

a first integrated device comprising a first plurality of interconnects;

a second plurality of solder interconnects coupled to the first plurality of interconnects;

a second integrated device comprising a second plurality of interconnects, wherein the second integrated device is coupled to the first integrated device through the second plurality of interconnects, the second plurality of solder interconnects and the first plurality of interconnects;

a polymer layer located between the first integrated device and the second integrated device;

a plurality of spacer balls located between the first integrated device and the second integrated device; and

an underfill at least partially surrounding the plurality of solder interconnects;

wherein a portion of the polymer layer at least partially surrounds the plurality of spacer balls and is laterally adjacent to the underfill and in direct contact with the underfill.

19. The package of claim 18 , wherein the first integrated device from the stack of integrated devices is coupled to the substrate through the first plurality of solder interconnects.

20. The package of claim 18 , wherein the plurality of spacer balls includes particles that include mono-dispersed particles, polyethylene polymer particles, silica, glass, polymer, ceramic, and/or metal.

21. The package of claim 18 , wherein the underfill is located between the first integrated device and the second integrated device.

22. The package of claim 18 , wherein the first integrated device is coupled to the second integrated device through front side to front side coupling, front side to back side coupling, back side to front side coupling or back side to back side coupling.

23. A method for fabricating a package, comprising:

providing a second integrated device comprising a second plurality of interconnects and a plurality of solder interconnects coupled to the second plurality of interconnects;

providing an underfill at least partially surrounding the plurality of solder interconnects;

providing a polymer layer and a plurality of spacer balls over the second integrated device; and

coupling a first integrated device comprising a first plurality of interconnects, to the second integrated device such that the second integrated device is coupled to the first integrated device through the second plurality of interconnects, the plurality of solder interconnects and the first plurality of interconnects,

wherein the first integrated device is coupled to the second integrated device such that the polymer layer and the plurality of spacer balls are located between the first integrated device and the second integrated device;

wherein a portion of the polymer layer at least partially surrounds the plurality of spacer balls and is laterally adjacent to the underfill and in direct contact with the underfill.

24. The method of claim 23 , wherein the polymer layer comprises an adhesive layer.

25. The method of claim 23 , wherein the plurality of spacer balls includes particles that include mono-dispersed particles, polyethylene polymer particles, silica, glass, polymer, ceramic, and/or metal.

26. The method of claim 23 , wherein the underfill is located between the first integrated device and the second integrated device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2022
From: SUN, YANGYANG; HE, DONGMING; ZHAO, LILY
To: QUALCOMM INCORPORATED
Reel/Frame 059151/0731 →
Continuity (1)
Related Publication 20230223375A1 · Jul 13, 2023
Cited By (1)
US 12,745,680