Peak current limit management for high frequency buck converter
A controller for a voltage converter, such as a buck converter, includes: a switching regulator circuit having high side and low side switches; comparators configured to compare a voltage of an output circuit to reference voltages; and a control circuit coupled to the current comparators, configured to receive outputs from the comparators, and configured to generate a control signal for alternatingly switching the high side and low side switches off and on, such that the low side switch is off when the high side switch is on, and the high side switch is off when the low side switch is on, and wherein the control circuit includes a latching circuit configured to latch a signal corresponding to at least one of the outputs from the comparators. A method of operating a buck converter in connection with a fixed high-frequency automotive radar system, with reliable over-current detection, is also disclosed.
1. A controller for a voltage converter, the controller comprising:
a switching regulator circuit having a regulator input, a regulator output, a high side switch and a low side switch, wherein the high side switch is coupled between the regulator input and a switching terminal, and the low side switch is coupled between the switching terminal and a ground terminal;
a current comparison circuit having at least four comparators, each respective comparator having first and second comparator inputs and a comparator output, wherein each respective first comparator input is coupled to the switch terminal, and each respective second comparator input is coupled to a respective reference voltage source; and
a switching regulator control circuit coupled to the current comparison circuit, configured to receive a respective comparator output from each of the comparators, and configured to generate a control signal for alternatingly switching the high side switch and the low side switch off and on, such that the low side switch is off when the high side switch is on, and the high side switch is off when the low side switch is on, and wherein the switching regulator control circuit includes a latching circuit configured to latch a signal corresponding to at least one comparator output;
wherein two of the comparators are configured to compare a sensed current at the switching terminal to a first set of current limit levels defining an upper current limit range, two of the comparators are configured to compare the sensed current at the switching terminal to a second set of current limit levels defining a lower current limit range.
2. The controller of claim 1 , wherein the high side switch and the low side switch include transistors.
3. The controller of claim 2 , wherein a voltage at the regulator input is applied to a first end of an inductor when the high side switch is on, and the first end of the inductor is connected to the ground terminal when the low side switch is on.
4. The controller of claim 1 , wherein the regulator output is adapted to be coupled to a load, and an inductor is coupled between the switching terminal and the regulator output, and a capacitor is coupled between to the inductor and the ground terminal.
5. The controller of claim 1 , wherein the latching circuit includes a latch configured to latch a signal associated with a lower current limit level of the first set of current limit levels.
6. The controller of claim 5 , wherein the switching regulator control circuit includes a second latching circuit configured to latch a signal corresponding to a respective comparator output from one of the comparators.
7. The controller of claim 6 , wherein the second latching circuit includes a latch configured to latch a signal associated with an upper current limit level of the second set of current limit levels.
8. The controller of claim 1 , wherein the latching circuit includes a latch configured to latch a signal associated with an upper current limit level of the second set of current limit levels.
9. The controller of claim 8 , wherein the switching regulator control circuit includes a second latching circuit configured to latch a signal corresponding to a respective comparator output from one of the comparators.
10. The controller of claim 9 , wherein the second latching circuit includes a latch configured to latch a signal associated with a lower current limit level of the first set of current limit levels.
11. A controller for a buck voltage converter, the controller comprising:
a switching regulator circuit having a regulator input, a regulator output, a high side switch, and a low side switch, wherein the high side switch and the low side switch are coupled together in series and connected at a switching terminal;
a current comparison circuit having at least four comparators, each respective comparator having first and second comparator inputs and a comparator output, wherein each respective first comparator input is coupled to the switch terminal, and each respective second comparator input is coupled to a respective reference voltage source; and
a switching regulator control circuit coupled to the current comparison circuit, configured to receive a respective comparator output from each of the comparators, and configured to generate a control signal for alternatingly switching the high side switch and the low side switch off and on, such that the low side switch is off when the high side switch is on, and the high side switch is off when the low side switch is on, and wherein the switching regulator control circuit includes a latching circuit configured to latch a signal corresponding to at least one comparator output, such that an over-current condition at the switching terminal is detected;
wherein the comparators are configured to compare a sensed current at the switching terminal to a first set of current limit levels defining an upper current limit range, and to a second set of current limit levels defining a lower current limit range.
12. The controller of claim 11 , wherein the high side switch and the low side switch include transistors, and the switching regulator circuit is configured such that a voltage at the regulator input is adapted to be provided to a first end of an inductor when the high side switch is on, and the first end of the inductor is connected to ground when the low side switch is on.
13. The controller of claim 12 , wherein the latching circuit includes a latch configured to latch a signal associated with a lower current limit level of the first set of current limit levels.
14. The controller of claim 13 , wherein the switching regulator control circuit includes a second latching circuit configured to latch a signal corresponding to an output from one of the comparators.
15. The controller of claim 14 , wherein the second latching circuit includes a latch configured to latch a signal associated with an upper current limit level of the second set of current limit levels.
16. The controller of claim 11 , wherein the latching circuit includes a latch configured to latch a signal associated with an upper current limit level of the second set of current limit levels.
17. The controller of claim 16 , wherein the switching regulator control circuit includes a second latching circuit configured to latch a signal corresponding to one comparator output.
18. The controller of claim 17 , wherein the second latching circuit includes a latch configured to latch a signal associated with a lower current limit level of the second set of current limit levels.
19. A method of converting an input voltage to an output voltage, the method comprising:
providing a high side switch and a low side switch, wherein the input voltage is provided to the high side switch, and coupling the low side switch to ground, and alternatingly providing the input voltage and the ground to an inductor;
comparing a voltage representative of a current in the inductor to reference voltages; and
applying outputs from the comparators to a switching regulator control circuit, and using the switching regulator control circuit to generate a control signal for alternatingly switching the high side switch and the low side switch off and on, such that the low side switch is off when the high side switch is on, and the high side switch is off when the low side switch is on, and using a latching circuit to latch a signal corresponding to at least one of the outputs from the comparators; and
using at least four comparators configured to compare a sensed current to a first set of current limit levels defining an upper current limit range, and to a second set of current limit levels defining a lower current limit range.
20. The method of claim 19 , wherein the high side switch and the low side switch include transistors, and wherein the transistors are operated such that an input is applied to a first end of the inductor when the high side switch is on, and the first end of the inductor is connected to ground when the low side switch is on.
21. The method of claim 19 , wherein using the latching circuit includes latching a signal associated with a current limit level of the first set of current limit levels.
22. The method of claim 19 , further comprising applying the output voltage to a component of a high-frequency automotive radar system.