System of providing power to chip on mainboard
A system of providing power to a chip on a mainboard includes: a first power supply, located on the mainboard, and being configured to receive a first voltage and to provide a second voltage; and a second power supply and a third power supply, located on the mainboard and disposed at different sides of the chip, each of the second power supply and the third power supply is electrically connected to the first power supply to receive the second voltage, the second power supply provides a third voltage to the chip, the third power supply provides a fourth voltage to the chip, and Z BUS_2 ≤5*(Z PS2_2 +Z PDN_2 ), Z BUS_2 is bus impedance between the first power supply and the third power supply, Z PS2_2 is equivalent output impedance of the third power supply, and Z PDN_2 is transmission impedance between the third power supply and the chip.
1. A system of providing power to a chip on a mainboard, comprising:
a first power supply, located on the mainboard, wherein the first power supply is configured to receive a first voltage and to provide a second voltage; and
a second power supply and a third power supply, wherein the second power supply and the third power supply are located on the mainboard and disposed at different sides of the chip, each of the second power supply and the third power supply is electrically connected to the first power supply to receive the second voltage, the second power supply provides a third voltage to the chip, the third power supply provides a fourth voltage to the chip, and
Z BUS_2 ≤5*( Z PS2_2 +Z PDN_2 ),
wherein Z BUS_2 is bus impedance between the first power supply and the third power supply, Z PS2_2 is equivalent output impedance of the third power supply, and Z PDN_2 is transmission impedance between the third power supply and the chip.
2. The system according to claim 1 , wherein the first power supply, the second power supply and the third power supply are DC-DC converters, and the first voltage is greater than the third voltage or the fourth voltage.
3. The system according to claim 1 , wherein
the first voltage is greater than the second voltage; and
the second voltage is greater than the third voltage and the fourth voltage.
4. The system according to claim 1 , wherein
equivalent output impedance of each of the second power supply and the third power supply is smaller than equivalent output impedance of the first power supply.
5. The system according to claim 1 , wherein
a distance on the mainboard between each of the second power supply and the third power supply and the chip is less than or equal to a distance on the mainboard between the first power supply and the chip; and
a distance between the first power supply and the second power supply is less than a distance between the first power supply and the third power supply.
6. The system according to claim 1 , wherein
the first power supply and the second power supply are located at a first side of the chip, the third power supply is located at a second side of the chip, and the first side and the second side are adjacent or opposite sides of the chip.
7. The system according to claim 1 , wherein
the first power supply, the second power supply and the third power supply are switching power supplies;
an operating frequency of each of the second power supply and the third power supply is higher than an operating frequency of the first power supply; and
a dynamic response speed of each of the second power supply and the third power supply is greater than a dynamic response speed of the first power supply.
8. The system according to claim 1 , wherein
a dynamic response speed of the second power supply is greater than a dynamic response speed of the third power supply; and
output power of the second power supply in response to a load dynamic change of the chip is greater than output power of the third power supply in response to the load dynamic change of the chip.
9. The system according to claim 1 , wherein
output impedance of the second power supply is smaller than output impedance of the third power supply; and
a dynamic current provided by the second power supply is greater than a dynamic current provided by the third power supply.
10. The system according to claim 1 , wherein
an operating frequency of the second power supply is higher than an operating frequency of the third power supply, the second power supply provides a high frequency component of a dynamic current to the chip, and the third power supply provides a low frequency component of the dynamic current to the chip.
11. The system according to claim 1 , wherein
the chip is a multicore chip, comprising a first core and a second core; and
the second power supply provides the third voltage to the first core, and the third power supply provides the fourth voltage to the second core.
12. A system of providing power to a chip on a mainboard, comprising:
a first power supply and a second power supply, wherein the first power supply and the second power supply are located on the mainboard, each of the first power supply and the second power supply is configured to receive a first voltage, the first power supply provides a second voltage, and the second power supply provides a third voltage;
a third power supply and a fourth power supply, wherein the third power supply and the fourth power supply are located on the mainboard, the third power supply is electrically connected to the first power supply to receive the second voltage, the fourth power supply is electrically connected to the second power supply to receive the third voltage, the third power supply and the first power supply are disposed at a first side of the chip, the fourth power supply and the second power supply are disposed at a second side of the chip, the first side of the chip and the second side of the chip are adjacent or opposite sides of the chip, the third power supply provides a fourth voltage to the chip, the fourth power supply provides a fifth voltage to the chip; and
at least one power supply controller, located on the mainboard, and configured to control operation of the third power supply and the fourth power supply.
13. The system according to claim 12 , wherein the first power supply, the second power supply, the third power supply and the fourth power supply are DC-DC converters, and the first voltage is greater than the fourth voltage or the fifth voltage.
14. The system according to claim 12 , wherein
output of the first power supply and output of the second power supply are not connected in parallel.
15. The system according to claim 14 , wherein
the power supply controller performs distribution of a load current of the third power supply and a load current of the fourth power supply to realize distribution of a load current of the first power supply and a load current of the second power supply, and the load current is in at least one state of a steady state or a dynamic state.
16. The system according to claim 12 , wherein
the power supply controller is placed at a position equidistant from the third power supply and the fourth power supply.
17. The system according to claim 12 , wherein
each of the third power supply and the fourth power supply corresponds to a power supply controller of the at least one power supply controller, and power supply controllers of the third power supply and the fourth power supply communicate with each other, so as to control the operation of the third power supply and the fourth power supply respectively.
18. The system according to claim 12 , wherein
each of the third power supply and the fourth power supply corresponds to a power supply controller of the at least one power supply controller, the power supply controller of the third power supply is configured to independently control the operation of the third power supply, the power supply controller of the fourth power supply is configured to independently control the operation of the fourth power supply, and power supply controllers of the third power supply and the fourth power supply do not communicate with each other.
19. The system according to claim 12 , wherein
input of the third power supply and input of the fourth power supply are connected in parallel, and Z BUS_2 ≤5*(Z PS2_2 +Z PDN_2 ),
wherein Z BUS_2 is bus impedance between the first power supply and the fourth power supply, Z PS2_2 is equivalent output impedance of the fourth power supply, and Z PDN_2 is transmission impedance between the fourth power supply and the chip.
20. The system according to claim 12 , wherein
the first voltage is greater than the second voltage and the third voltage, the second voltage is greater than the fourth voltage and the third voltage is greater than the fifth voltage, and the second voltage is different from the third voltage.
21. The system according to claim 12 , wherein
a distance on the mainboard between each of the third power supply and the fourth power supply and the chip is less than or equal to a distance on the mainboard between each of the first power supply and the second power supply and the chip;
equivalent output impedance of the third power supply is smaller than equivalent output impedance of the first power supply; and
equivalent output impedance of the fourth power supply is smaller than equivalent output impedance of the second power supply.
22. The system according to claim 12 , wherein
the chip is a multicore chip, comprising at least a first core and a second core; and
the third power supply provides the fourth voltage to the first core, and the fourth power supply provides the fifth voltage to the second core.
23. The system according to claim 12 , wherein
a dynamic response speed of the third power supply is greater than a dynamic response speed of the first power supply; and
a dynamic response speed of the fourth power supply is greater than a dynamic response speed of the second power supply.
24. The system according to claim 12 , wherein
a dynamic response speed of the third power supply is greater than a dynamic response speed of the fourth power supply; and
output power of the third power supply in response to a load dynamic change of the chip is greater than output power of the fourth power supply in response to the load dynamic change of the chip.
25. The system according to claim 12 , wherein
output impedance of the third power supply is smaller than output impedance of the fourth power supply; and
a dynamic current provided by the third power supply is greater than a dynamic current provided by the fourth power supply.
26. The system according to claim 12 , wherein
an operating frequency of the third power supply is higher than an operating frequency of the fourth power supply, the third power supply provides a high frequency component of a dynamic current to the chip, and the fourth power supply provides a low frequency component of the dynamic current to the chip.
27. The system according to claim 12 , wherein
the first power supply and the second power supply are located on a first surface of the mainboard, the third power supply and the fourth power supply are located on a second surface of the mainboard, a projection of the third power supply and a projection of the first power supply on the mainboard are at least partially overlapped, and a projection of the fourth power supply and a projection of the second power supply on the mainboard are at least partially overlapped.