IP Library › Granted Patent US 11,977,464
Granted Patent B2
US 11,977,464 · App. 17/656,502 · Granted May 7, 2024

Error rate measuring apparatus and error rate measuring method

Inventor: Ryo Sunayama (Kanagawa, JP)
Assignee: ANRITSU CORPORATION
G06F11/263G06F11/076G06F11/0772G06F11/2733G06F11/3075
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Quick Facts
Patent No.
US 11,977,464
App. No.
17/656,502
Granted
May 7, 2024
Kind
B2
Abstract

An error rate measuring apparatus detects a bit error of input data returned from a device under test with transmission of a test signal at an error detector, and includes a log recording unit that records log data of state transition of each lane by handshakes of a plurality of lanes in a predetermined communication standard with respect to the device under test in making the device under test transit to a state of LOOPBACK, and a display unit that displays the recorded log data of the state transition of each lane in a time-series order.

Claims (24)

1. An error rate measuring apparatus having

a pattern generator configured to, when a device under test is in a signal pattern return mode in a predetermined communication standard, transmit a test signal of a known pattern to the device under test, and

an error detector configured to detect a bit error of input data returned from the device under test with the transmission of the test signal,

wherein the predetermined communication standard is a standard for performing communication in a plurality of lanes,

wherein the error rate measuring apparatus comprises:

a log recording unit configured to record log data of state transitions of each of the plurality of lanes when the device under test is transited to the signal pattern return mode in each lane,

wherein the log recording unit is configured to record a waiting state for one lane when the one lane satisfies a state transition condition for progressing to a next state and waits to progress to the next state until another lane satisfies the state transition condition, and

wherein the device under test and the error rate measuring apparatus comprise a same link training and status state machine.

2. The error rate measuring apparatus according to claim 1 , further comprising:

a display unit that displays the log data of the state transitions of each lane recorded in the log recording unit in a time-series order.

3. The error rate measuring apparatus according to claim 1 , wherein the communication standard is a communication standard of a high speed serial bus.

4. The error rate measuring apparatus according to claim 1 , further comprising:

a display unit that displays on one display screen the log data of the state transitions of each lane recorded in the log recording unit when a two-lane handshake communication in each lane succeeds or fails in a time-series order.

5. An error rate measuring method for an error rate measuring apparatus having a pattern generator that, when a device under test is in a signal pattern return mode in a predetermined communication standard, transmits a test signal of a known pattern to the device under test,

the predetermined communication standard being a standard for performing communication in a plurality of lanes, and

an error detector that detects a bit error of input data returned from the device under test with the transmission of the test signal, the error rate measuring method comprising:

a step of recording log data of state transitions of each of the plurality of lanes when the device under test is transited to the signal pattern return mode in each lane, at a log recording unit provided in the error detector,

wherein recording the log data comprises recording data that indicates a waiting state for one lane when the one lane satisfies a state transition condition for progressing to a next state and waits to progress to the next state until another lane satisfies the state transition condition, and

wherein the device under test and the error rate measuring apparatus comprise a same link training and status state machine.

6. The error rate measuring method according to claim 5 , further comprising:

a step of displaying the log data of the state transition of each lane recorded in the log recording unit on a display unit in a time-series order.

7. The error rate measuring method according to claim 5 , wherein the communication standard is a communication standard of a high speed serial bus.

8. The error rate measuring method according to claim 5 , further comprising:

a step of displaying on one display screen the log data of the state transitions of each lane recorded in the log recording unit when a two-lane handshake communication in each lane succeeds or fails on a display unit in a time-series order.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2022
From: SUNAYAMA, RYO
To: ANRITSU CORPORATION
Reel/Frame 059402/0346 →
Priority Claims (1)
JP 2021-096656 · Jun 9, 2021 · national
Continuity (1)
Related Publication 20220398177A1 · Dec 15, 2022
Cited By (1)
US 12,253,924