Model architecture search and optimization for hardware

1. A computer-implemented method comprising:

training, based on a data set associated with a data transformation operation and information associated with a pool of processing units, a parameterized model associated with the data transformation operation, wherein the training comprises updating at least one parameter of the parameterized model associated with configuring at least a subset of the processing units; and

outputting, based on the training, one or more configurations for at least the subset of the processing units.

2. The computer-implemented method of claim 1 , wherein the pool of processing units performs one or more arithmetic operations and one or more signal selection operations.

3. The computer-implemented method of claim 1 , further comprising:

generating the parameterized model, wherein the generating comprises generating a mapping between each of the processing units in the pool to one of a plurality of differentiable functional blocks.

4. The computer-implemented method of claim 1 , wherein the training the parameterized model is further based on a hardware resource constraint indicated by the information associated with the pool of processing units.

5. The computer-implemented method of claim 1 , wherein the data transformation operation includes a sequence of at least a first data transformation and a second data transformation, and wherein the training comprises:

calculating a first parameter associated with the first data transformation and a second parameter associated with the second data transformation.

6. The computer-implemented method of claim 5 , wherein the calculating the first parameter associated with the first data transformation and the second parameter associated with the second data transformation is further based on a backpropagation and a loss function.

7. The computer-implemented method of claim 5 , wherein the first data transformation or the second data transformation in the sequence is associated with an executable instruction code.

8. The computer-implemented method of claim 5 , wherein:

the data transformation operation is associated with a digital predistortion (DPD) for pre-distorting an input signal to a nonlinear electronic component;

the first data transformation in the sequence comprises selecting, based on the first parameter, memory terms from the input signal;

the second data transformation in the sequence comprises generating, based on the second parameter, features associated with a nonlinear characteristic of the nonlinear electronic component using a set of basis functions and the selected memory terms; and

the sequence associated with the data transformation operation further comprises a third data transformation comprising generating a pre-distorted signal based on the features.

9. The computer-implemented method of claim 5 , wherein:

the data transformation operation is associated with a digital predistortion (DPD) for pre-distorting an input signal to a nonlinear electronic component;

the first data transformation in the sequence comprises selecting, based on the first parameter, memory terms from a feedback signal indicative of an output of the nonlinear electronic component or the input signal;

the second data transformation in the sequence comprises generating, based on the second parameter, features associated with a nonlinear characteristic of the nonlinear electronic component using a set of basis functions and the selected memory terms; and

the sequence associated with the data transformation operation further comprises a third data transformation comprising updating coefficients based on the features and a second signal.

10. The computer-implemented method of claim 9 , wherein the training the parameterized model further comprises:

performing backpropagation to update the second parameter to generate the set of basis functions.

11. The computer-implemented method of claim 9 , wherein the outputting the one or more configurations comprises:

outputting the one or more configurations further indicating at least one of a lookup table (LUT) configuration associated with the selection of the memory terms or the set of basis functions.

12. A computer-implemented system comprising:

a memory comprising instructions; and

one or more computer processors, wherein the instructions, when executed by the one or more computer processors, cause the one or more computer processors at least to:

train, based on a data set associated with a data transformation and information associated with a pool of processing units, a parameterized model associated with the data transformation, wherein training the parameterized model comprises updating at least one parameter of the parameterized model associated with configuring at least a subset of the processing units in the pool; and

output, based on the training, one or more configurations for at least the subset of the processing units in the pool.

13. The computer-implemented system of claim 12 , wherein the pool of processing units performs one or more arithmetic computations and one or more signal selections, wherein the instructions, when executed by the one or more computer processors, further cause the one or more computer processors to:

generate the parameterized model by generating a mapping between each of the processing units in the pool and one of a plurality of differentiable functional blocks.

14. The computer-implemented system of claim 12 , wherein:

the data transformation includes a sequence of at least a first data transformation and a second data transformation; and

training the parameterized model comprises:

calculating a first parameter associated with the first data transformation and a second parameter associated with the second data transformation based on a backpropagation and a loss function.

15. The computer-implemented system of claim 14 , wherein the subset of the processing units comprises:

one or more digital hardware blocks associated with the first data transformation; and

one or more processors for executing instruction codes associated with the second data transformation.

16. The computer-implemented system of claim 12 , wherein:

the data transformation is associated with at least one of a digital predistortion (DPD) actuation or a DPD adaptation for pre-distorting an input signal to a nonlinear electronic component; and

outputting the one or more configurations comprises outputting at least one of a DPD actuation configuration or a DPD adaptation configuration.

17. A non-transitory computer-readable storage medium including instructions that, when executed by one or more computer processors, cause the one or more computer processors to perform operations comprising:

training a parameterized model to configure one or more processing units to perform a data transformation, wherein the training is based on a data set associated with the data transformation and information associated with a pool of processing units including the one or more processing units, and wherein the training comprises updating at least one parameter of the parameterized model associated with configuring at least a subset of the processing units in the pool; and

outputting, based on the training, one or more configurations for at least the subset of the processing units.

18. The non-transitory computer-readable storage medium of claim 17 , wherein the pool of processing units performs one or more arithmetic computations and one or more signal selections, and wherein:

the data transformation includes a sequence of at least a first data transformation and a second data transformation; and

the training further comprises:

updating a first parameter associated with the first data transformation and a second parameter associated with the second data transformation based on back propagation and a loss function.

19. The non-transitory computer-readable storage medium of claim 18 , wherein:

the data transformation is associated with a digital predistortion (DPD) for pre-distorting an input signal to a nonlinear electronic component; and

the first data transformation in the sequence comprises selecting, based on the first parameter, memory terms from the input signal; and

the second data transformation in the sequence comprises generating, based on the second parameter, features associated with a nonlinear characteristic of the nonlinear electronic component using a set of basis functions and the selected memory terms; and

the sequence further comprises a third data transformation comprising generating a pre-distorted signal based on the features.

20. The non-transitory computer-readable storage medium of claim 18 , wherein:

the data transformation is associated with a digital predistortion (DPD) for pre-distorting an input signal to a nonlinear electronic component;

the first data transformation in the sequence comprises selecting, based on the first parameter, memory terms from a feedback signal indicative of an output of the nonlinear electronic component or the input signal;

the second data transformation in the sequence comprises generating, based on the second parameter, features associated with a nonlinear characteristic of the nonlinear electronic component using a set of basis functions and the selected memory terms;

the sequence further comprises a third data transformation comprising updating coefficients based on the features and a second signal;

the first data transformation and the second data transformation are to be performed by the subset of the processing units; and

the third data transformation is to be performed by executing instruction codes on at least another processing unit in the pool.