Neural Volterra digital compensator with feature neural network
View Patent ↗Aspects of this disclosure relate to digital compensators, such as digital predistortion systems. Digital predistortion systems disclosed herein use a neural Volterra approach. Such digital predistortion systems can include a feature processing path comprising a feature artificial neural network, an envelope processing path, multipliers configured to multiply respective output signals of the feature processing path and the envelope processing path, and a combiner configured to generate a combined output signal based on at least output signals of the multipliers. The combined output signal is a digitally predistorted version of an input signal.
1 . A digital predistortion system comprising:
a feature processing path configured to transform an input signal in a complex-valued domain, the feature processing path comprising a feature artificial neural network having a plurality of outputs;
an envelope processing path configured to derive an envelope of the input signal and apply a non-linear gain function;
multipliers configured to multiply respective output signals of the feature processing path and the envelope processing path; and
a combiner configured to generate a combined output signal based on at least output signals of the multipliers and output the combined output signal, the combined output signal being a digitally predistorted version of the input signal.
2 . The digital predistortion system of claim 1 , wherein the feature processing path comprises a feature preprocessing block configured to transform the input signal from a complex signal to a real signal, the feature preprocessing block having an output coupled to an input of the feature artificial neural network.
3 . The digital predistortion system of claim 1 , wherein the feature artificial neural network is configured to receive at least one of a sensor input signal or an external input signal.
4 . The digital predistortion system of claim 1 , wherein the envelope processing path comprises an envelope artificial neural network.
5 . A digital predistortion system comprising:
a feature processing path configured to transform an input signal in a complex valued domain, the feature processing path comprising a feature artificial neural network;
an envelope processing path configured to derive an envelope of the input signal and apply a non-linear gain function, the envelope processing path comprising:
an envelope processing block configured to derive the envelope of the input signal; and
a gain block coupled to an output of the envelope processing block, the gain block comprising a plurality of non-linear gain blocks configured to apply non-linear transformations to implement the non-linear gain function;
multipliers configured to multiply respective output signals of the feature processing path and the envelope processing path; and
a combiner configured to generate a combined output signal based on at least output signals of the multipliers and output the combined output signal, the combined output signal being a digitally predistorted version of the input signal.
6 . The digital predistortion system of claim 5 , wherein the envelope processing path comprises additional combiners connected to outputs of the gain block, the additional combiners connected to respective inputs of the multipliers.
7 . The digital predistortion system of claim 5 , wherein the envelope processing path comprises a signal partitioning block configured to delay and partition the input signal, the signal partitioning block having an output connected to an input of the envelope processing block.
8 . The digital predistortion system of claim 5 , wherein the envelope processing path comprises a signal partitioning block configured to delay and partition a signal provided by the envelope processing block, the signal partitioning block being coupled between the envelope processing block and the gain block.
9 . The digital predistortion system of claim 5 , wherein the non-linear gain blocks comprise look up tables.
10 . The digital predistortion system of claim 1 , further comprising:
Volterra processing blocks comprising non-linear processing blocks, non-linear gain blocks having inputs connected to outputs of the non-linear processing blocks, a set of combiners each configured to combine output signals of a group of non-linear grain blocks of the non-linear gain block, and a second set of multipliers coupled to the set of combiners;
wherein the combiner is configured to combine output signals from the second set of multipliers with the output signals from the multipliers to generate the combined output signal.
11 . The digital predistortion system of claim 1 , wherein the digital predistortion system is included on a transceiver integrated circuit.
12 . The digital predistortion system of claim 1 , wherein the input signal is a digital baseband signal that comprises a data stream of in-phase and quadrature samples, and wherein the digital predistortion system is configured to perform sample rate digital predistortion.
13 . A wireless communication system comprising:
a transceiver integrated circuit comprising the digital predistortion system of claim 1 ; and
a power amplifier in communication with the transceiver integrated circuit, the digital predistortion system configured to reduce non-linearity of the power amplifier.
14 . The wireless communication system of claim 13 , wherein the transceiver integrated circuit comprises a sensor having an output connected to an input of the feature artificial neural network.
15 . The wireless communication system of claim 13 , wherein:
a digital predistortion actuator comprises the feature processing path, the multipliers, and the combiner; and
the transceiver integrated circuit comprises a digital predistortion adaptation circuit in communication with the digital predistortion actuator.
16 . A method of digital predistortion, the method comprising:
transforming a digital input signal in a complex-valued domain using at least a feature artificial neural network having a plurality of outputs;
generating an envelope signal by at least deriving an envelope of the digital input signal;
applying a non-linear gain function to the envelope signal;
multiplying signals generated by the transforming with signals generated by the applying; and
generating a combined output signal based on at least output signals generated by the multiplying, wherein the combined output signal is a digitally predistorted version of the digital input signal.
17 . The method of claim 16 , wherein the generating the envelope signal further comprises applying a delay and partitioning the digital input signal before the deriving the envelope.
18 . The method of claim 16 , wherein the generating the envelope signal further comprises applying a delay and portioning the digital input signal after the deriving the envelope, and wherein deriving the envelope uses an envelope artificial neural network.
19 . The method of claim 16 , wherein the feature artificial neural network receives a sensor input signal from a sensor.
20 . The method of claim 16 , further comprising performing Volterra processing on the digital input signal, wherein the combining comprises combining output signals of the Volterra processing with the output signals generated by the multiplying.