IP Library Granted Patent US 12,015,864
Granted Patent B2
US 12,015,864 · App. 18/354,917 · Granted Jun 18, 2024

Comparator, AD converter, solid-state imaging device, electronic apparatus, and method of controlling comparator

Inventors: Masaki Sakakibara (Kanagawa, JP); Kenichi Aoyagi (Kanagawa, JP); Seiji Yamada (Kanagawa, JP)
Assignee: Sony Group Corporation
H04N25/77H01L27/1461H01L27/14612H01L27/14621H01L27/14627H01L27/14634H01L27/14636H01L27/1464H01L27/14645H03K5/24H03K5/2481H04N25/75H04N25/772H04N25/79
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Quick Facts
Patent No.
US 12,015,864
App. No.
18/354,917
Granted
Jun 18, 2024
Kind
B2
Abstract

The present disclosure relates to a comparator, an AD converter, a solid-state imaging device, an electronic apparatus, and a comparator control method that can reduce power consumption while increasing the determination speed of the comparator. The comparator includes a comparison unit, a positive feedback circuit, and a current limiting unit. The comparison unit compares the voltage of an input signal and the voltage of a reference signal, and outputs a comparison result signal. The positive feedback circuit increases the transition speed at the time when the comparison result signal is inverted. The current limiting unit limits the current flowing in the comparison unit after the inversion of the comparison result signal. The present disclosure can be applied to comparators, for example.

Claims (58)

1. A light detecting device, comprising:

a first substrate;

a second substrate laminated to the first substrate; and

a third substrate laminated to the second substrate,

wherein:

the first substrate includes:

a pixel circuit having a photodiode, and

a first part of a differential amplification circuit coupled to the pixel circuit,

the second substrate includes a second part of the differential amplification circuit coupled to the first part of the differential amplification circuit, and

the third substrate includes a latch storage unit coupled to the second part of the differential amplification circuit.

2. The light detecting device according to claim 1 , wherein the second substrate further includes a feedback circuit coupled to the second part of the differential amplification circuit.

3. The light detecting device according to claim 2 , wherein the second substrate further includes an inverter coupled to the feedback circuit.

4. The light detecting device according to claim 1 , wherein:

the first part of the differential amplification circuit includes a first input and a second input,

the first input is coupled to the pixel circuit, and

the second input is coupled to a digital-to-analog converter that controls a voltage of a reference signal.

5. The light detecting device according to claim 1 , wherein the second part of the differential amplification circuit includes a current mirror having a first p-channel metal oxide semiconductor (PMOS) transistor and a second PMOS transistor.

6. The light detecting device according to claim 1 , wherein:

the first substrate and the second substrate are electrically connected by a first metal bonding, and

the second substrate and the third substrate are electrically connected by a second metal bonding.

7. The light detecting device according to claim 6 , wherein the first part of the differential amplification circuit and the second part of the differential amplification circuit are electrically connected by the first metal bonding.

8. The light detecting device according to claim 1 , wherein the latch storage unit is configured to receive a signal from the second part of the differential amplification circuit and a time code.

9. The light detecting device according to claim 8 , wherein the time code is a Gray code.

10. The light detecting device according to claim 1 , wherein the first substrate further includes a reset transistor coupled to a transistor of the first part of the differential amplification circuit.

11. Alight detecting device, comprising:

a first substrate;

a second substrate laminated to the first substrate; and

a third substrate laminated to the second substrate, wherein:

the first substrate includes:

a pixel circuit having a photodiode, and

a first part of a comparator coupled to the pixel circuit,

the second substrate includes a second part of the comparator coupled to the first part of the comparator, and

the third substrate includes a latch storage unit coupled to the second part of the comparator.

12. The light detecting device according to claim 11 , wherein the first part of the comparator comprises a first part of a differential amplification circuit.

13. The light detecting device according to claim 12 , wherein the second part of the comparator comprises a second part of the differential amplification circuit, a feedback circuit, and an inverter.

14. An electric apparatus, comprising:

a digital signal processor; and

a light detecting device that output a pixel signal to the digital signal processor, the light detecting device comprising:

a first substrate;

a second substrate laminated to the first substrate; and

a third substrate laminated to the second substrate,

wherein:

the first substrate includes:

a pixel circuit having a photodiode, and

a first part of a differential amplification circuit coupled to the pixel circuit,

the second substrate includes a second part of the differential amplification circuit coupled to the first part of the differential amplification circuit, and

the third substrate includes a latch storage unit coupled to the second part of the differential amplification circuit.

15. The electric apparatus according to claim 14 , wherein the second substrate further includes a feedback circuit coupled to the second part of the differential amplification circuit.

16. The electric apparatus according to claim 15 , wherein the second substrate further includes an inverter coupled to the feedback circuit.

17. The electric apparatus according to claim 14 , wherein:

the first part of the differential amplification circuit includes a first input and a second input,

the first input is coupled to the pixel circuit, and

the second input is coupled to a digital-to-analog converter that controls a voltage of a reference signal.

18. The electric apparatus according to claim 14 , wherein the second part of the differential amplification circuit includes a current mirror having a first p-channel metal oxide semiconductor (PMOS) transistor and a second PMOS transistor.

19. The electric apparatus according to claim 14 , wherein:

the first substrate and the second substrate are electrically connected by a first metal bonding, and

the second substrate and the third substrate are electrically connected by a second metal bonding.

20. The electric apparatus according to claim 19 , wherein the first part of the differential amplification circuit and the second part of the differential amplification circuit are electrically connected by the first metal bonding.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 19, 2023
From: SAKAKIBARA, MASAKI; AOYAGI, KENICHI; YAMADA, SEIJI
To: SONY CORPORATION
Reel/Frame 064312/0661 →
CHANGE OF NAME Recorded Jul 19, 2023
From: SONY CORPORATION
To: SONY GROUP CORPORATION
Reel/Frame 064346/0160 →
Priority Claims (1)
JP 2014-144389 · Jul 14, 2014 · national
Continuity (6)
Continuation 17838925 · Jun 13, 2022
Continuation 16999557 · Aug 21, 2020
Continuation 16438219 · Jun 11, 2019
Continuation 15961584 · Apr 24, 2018
Continuation 14916652
Related Publication 20230362514A1 · Nov 9, 2023