IP Library › Granted Patent US 12,019,973
Granted Patent B2
US 12,019,973 · App. 18/318,602 · Granted Jun 25, 2024

Method for reticle enhancement technology of a design pattern to be manufactured on a substrate

Inventors: Akira Fujimura (Saratoga, CA); P. Jeffrey Ungar (Belmont, CA); Nagesh Shirali (San Jose, CA)
Assignee: D2S, Inc.
G06F30/398G03F1/36G03F1/70G03F1/74G03F1/78G03F7/70441G03F7/705G06F2119/18
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Quick Facts
Patent No.
US 12,019,973
App. No.
18/318,602
Granted
Jun 25, 2024
Kind
B2
Abstract

Methods for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include determining an initial mask pattern from a desired pattern for a substrate; calculating a first substrate pattern from the initial mask pattern; determining an initial set of VSB shots that will form the initial mask pattern; calculating a simulated mask pattern from the initial set of VSB shots; calculating a second substrate pattern from the simulated mask pattern; and adjusting the initial set of VSB shots, wherein the adjusting of the initial set of VSB shots creates an adjusted set of VSB shots.

Claims (26)

1. A method for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography, the method comprising:

determining an initial mask pattern from a desired pattern for a substrate;

calculating a first substrate pattern from the initial mask pattern;

determining an initial set of VSB shots based on the initial mask pattern;

calculating a second substrate pattern from a simulated mask pattern calculated with the initial set of VSB shots;

comparing the first substrate pattern with the second substrate pattern; and

adjusting the initial set of VSB shots until the second substrate pattern and the first substrate pattern are within a predetermined tolerance, creating an adjusted set of VSB shots.

2. The method of claim 1 , further comprising outputting the adjusted set of VSB shots.

3. The method of claim 1 , wherein the adjusting comprises optimizing the initial set of VSB shots for wafer quality, thereby creating an optimized mask pattern.

4. The method of claim 3 , further comprising outputting the optimized mask pattern.

5. The method of claim 1 , wherein the adjusting comprises resizing or moving one or more shots.

6. The method of claim 1 , wherein the adjusting comprises reducing Edge Placement Error between the first substrate pattern and the second substrate pattern.

7. The method of claim 1 , wherein calculating the first substrate pattern and calculating the second substrate pattern comprise lithography simulation.

8. The method of claim 1 wherein the initial mask pattern is curvilinear.

9. The method of claim 1 wherein the initial mask pattern is rectilinear.

10. The method of claim 1 , wherein the determining of the initial set of VSB shots optimizes for mask manufacturability.

11. The method of claim 1 , wherein the determining the initial mask pattern further comprises inverse lithography technology (ILT).

12. The method of claim 1 , wherein calculating the second substrate pattern further comprises calculating the simulated mask pattern from the initial set of VSB shots.

13. The method of claim 12 , wherein the calculating the simulated mask pattern uses a simple mask model.

14. The method of claim 13 , further comprising:

inputting a detailed mask model;

modifying the adjusted set of VSB shots to create a modified set of VSB shots, wherein the modified set of VSB shots complies with the detailed mask model; and

outputting the modified set of VSB shots.

15. The method of claim 14 , further comprising exposing a reticle with the modified set of VSB shots.

16. The method of claim 13 , wherein the simple mask model comprises a single Gaussian distribution.

17. The method of claim 13 , wherein the simple mask model comprises a constant etch bias.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2023
From: FUJIMURA, AKIRA; UNGAR, P. JEFFREY; SHIRALI, NAGESH
To: D2S, INC.
Reel/Frame 063671/0236 →
Continuity (2)
Continuation 17444140 · Jul 30, 2021
Related Publication 20230289510A1 · Sep 14, 2023
Cited By (2)
US 12,248,242 US 12,340,164