Semiconductor device including deep trench isolation structure comprising dielectric structure and copper structure and method of making the same
A semiconductor device is provided. The semiconductor device includes a first deep trench isolation (DTI) structure within a substrate. The first DTI structure includes a barrier structure, a dielectric structure, and a copper structure. The dielectric structure is between the barrier structure and the copper structure. The barrier structure is between the substrate and the dielectric structure.
1. A semiconductor device, comprising:
a photodiode within a substrate;
a first dielectric layer overlying the substrate, wherein:
a first portion of the first dielectric layer overlies the photodiode;
the first portion of the first dielectric layer has a tapered sidewall;
a first portion of the substrate separates the first portion of the first dielectric layer from the photodiode; and
the first dielectric layer directly contacts the substrate;
a first deep trench isolation (DTI) structure, wherein:
the first DTI structure comprises a barrier structure, a dielectric structure, and a copper structure;
an interface is defined where the barrier structure contacts the first dielectric layer;
the dielectric structure is between the barrier structure and the copper structure; and
the barrier structure is between the substrate and the dielectric structure; and
a second dielectric layer over the first DTI structure, wherein the barrier structure directly contacts the second dielectric layer.
2. The semiconductor device of claim 1 , wherein the first portion of the substrate has a first tapered sidewall that aligns with the tapered sidewall of the first portion of the first dielectric layer.
3. The semiconductor device of claim 2 , wherein:
a second portion of the first dielectric layer overlies the photodiode;
the second portion of the first dielectric layer has a tapered sidewall; and
the first portion of the substrate has a second tapered sidewall that aligns with the tapered sidewall of the second portion of the first dielectric layer.
4. The semiconductor device of claim 3 , wherein:
the first tapered sidewall of the first portion of the substrate has a first slope;
the second tapered sidewall of the first portion of the substrate has a second slope; and
the second slope is opposite in polarity relative to the first slope.
5. The semiconductor device of claim 1 , wherein:
the first DTI structure is laterally offset from the photodiode.
6. The semiconductor device of claim 5 , comprising:
a second DTI structure laterally offset from the photodiode, wherein:
the photodiode is between the first DTI structure and the second DTI structure;
the second DTI structure comprises a second barrier structure, a second dielectric structure, and a second copper structure;
the second dielectric structure is between the second barrier structure and the second copper structure; and
the second barrier structure is between the substrate and the second dielectric structure.
7. The semiconductor device of claim 1 , comprising:
a lens array, wherein a first lens of the lens array overlies the first portion of the first dielectric layer.
8. A semiconductor device, comprising:
a photodiode within a substrate, wherein a first portion of the substrate overlying the photodiode has a first tapered sidewall;
a first dielectric layer overlying the first tapered sidewall; and
a first deep trench isolation (DTI) structure within the substrate and the first dielectric layer and adjacent the photodiode, wherein:
the first DTI structure comprises a dielectric structure and a copper structure;
the copper structure completely fills from a first sidewall of the dielectric structure to a second sidewall of the dielectric structure such that there are no voids in the copper structure; and
the dielectric structure does not overlie the photodiode.
9. The semiconductor device of claim 8 , wherein the first DTI structure comprises a barrier structure separated from the copper structure by the dielectric structure.
10. The semiconductor device of claim 8 , wherein:
a second portion of the substrate overlying the photodiode has a second tapered sidewall, and
a top surface of the substrate between the first tapered sidewall and the second tapered sidewall has a planar surface.
11. A semiconductor device, comprising:
a photodiode within a substrate, wherein a first portion of the substrate overlying the photodiode has a first tapered sidewall;
a first dielectric layer overlying the first tapered sidewall; and
a first deep trench isolation (DTI) structure within the substrate and the first dielectric layer and adjacent the photodiode, wherein:
the first DTI structure comprises a dielectric structure and a copper structure;
the copper structure completely fills from a first sidewall of the dielectric structure to a second sidewall of the dielectric structure such that there are no voids in the copper structure; and
the dielectric structure and the copper structure do not overlie the photodiode.
12. The semiconductor device of claim 11 , wherein the first DTI structure comprises a barrier structure separated from the copper structure by the dielectric structure.
13. The semiconductor device of claim 12 , wherein a material composition of the barrier structure is different than a material composition of the first dielectric layer.
14. The semiconductor device of claim 12 , wherein the barrier structure is between the substrate and a bottommost surface of the dielectric structure.
15. The semiconductor device of claim 12 , wherein the dielectric structure is separated from the first dielectric layer by the barrier structure.
16. The semiconductor device of claim 11 , wherein:
a second portion of the substrate overlying the photodiode has a second tapered sidewall, and
a top surface of the substrate between the first tapered sidewall and the second tapered sidewall has a planar surface.
17. The semiconductor device of claim 11 , wherein:
the first DTI structure comprises a barrier structure, and
the semiconductor device comprises a second dielectric layer over the first DTI structure, wherein the barrier structure directly contacts the second dielectric layer.
18. The semiconductor device of claim 11 , comprising:
a second dielectric layer over the first DTI structure, wherein the dielectric structure directly contacts the second dielectric layer.
19. The semiconductor device of claim 11 , comprising:
a second dielectric layer over the first DTI structure, wherein the copper structure directly contacts the second dielectric layer.
20. The semiconductor device of claim 11 , wherein:
a coefficient of thermal expansion of the dielectric structure is between about 2.5 to about 16.