FinFETs and methods of forming FinFETs
An embodiment is a method including recessing a gate electrode over a semiconductor fin on a substrate to form a first recess from a top surface of a dielectric layer, forming a first mask in the first recess over the recessed gate electrode, recessing a first conductive contact over a source/drain region of the semiconductor fin to form a second recess from the top surface of the dielectric layer, and forming a second mask in the second recess over the recessed first conductive contact.
1. A method comprising:
forming a source region and a drain region on a substrate;
forming a first gate structure over the substrate, the first gate structure being between the source region and the drain region;
forming a dielectric layer over the source region, the drain region, and the first gate structure;
replacing the first gate structure with a second gate structure;
forming a first insulation layer over the second gate structure;
forming first openings in the dielectric layer to the source region and the drain region;
forming first conductive contacts in the first openings and electrically coupled to the source region and the drain region, top surfaces of the first conductive contacts being lower than a top surface of the dielectric layer;
forming a liner layer over the first conductive contacts, the dielectric layer, and the first insulation layer;
forming second insulation layers over the liner layer in the first openings; and
forming second conductive contacts in the second insulation layers, the second conductive contacts electrically coupled to the first conductive contacts.
2. The method of claim 1 , wherein the second insulation layers have top surfaces level with the top surface of the dielectric layer.
3. The method of claim 1 , wherein the first insulation layer has a top surface level with the top surface of the dielectric layer.
4. The method of claim 1 further comprising:
forming a third conductive contact in the first insulation layer, the third conductive contact contacting the second gate structure, top surfaces of the second conductive contact and the third conductive contacts being level.
5. The method of claim 1 , wherein a material composition of the first insulation layer is different from a material composition of the second insulation layers.
6. The method of claim 1 , wherein the liner layer is a metallic oxide or metallic nitride comprising aluminum, titanium, hafnium, zirconium, tantalum, or a combination thereof.
7. The method of claim 1 , wherein the first insulation layer comprises silicon nitride, and wherein the second insulation layers comprises silicon oxynitride, silicon carbide, or a combination thereof.
8. A method comprising:
forming a fin over a substrate;
forming an isolation region surrounding lower portions of the fin;
forming a first gate structure on the fin and the isolation region;
epitaxially growing a source/drain region on the fin adjacent the first gate structure;
depositing a dielectric layer over the isolation region and the source/drain region;
replacing the first gate structure with a second gate structure;
forming a first recess in the dielectric layer over the second gate structure and a second recess in the dielectric layer over the source/drain region;
depositing a first mask in the first recess, the first mask having a top surface level with a top surface of the dielectric layer;
forming a first conductive contact in the second recess, the first conductive contact contacting the source/drain region; and
depositing a second mask in the second recess over the first conductive contact, the second mask having a top surface level with the top surface of the dielectric layer; and
forming a second conductive contact in the second mask, the second conductive contact electrically coupled to the first conductive contact.
9. The method of claim 8 further comprising:
forming a liner layer in the second recess, the liner layer being between the first conductive contact and the second mask.
10. The method of claim 9 , wherein the liner layer is a metallic oxide or metallic nitride comprising aluminum, titanium, hafnium, zirconium, tantalum, or a combination thereof, and wherein the second mask comprises silicon oxynitride, silicon carbide, carbon-containing silicon oxide, or a combination thereof.
11. The method of claim 9 , wherein the second conductive contact extends through the second mask and the liner layer, a top surface of the second conductive contact being level with the top surface of the dielectric layer.
12. The method of claim 8 , wherein a material composition of the first mask is different from a material composition of the second mask.
13. The method of claim 8 , wherein the first mask comprises silicon nitride, and wherein the second mask comprises silicon oxynitride, silicon carbide, or a combination thereof.
14. The method of claim 8 further comprising:
forming a third conductive contact in the first mask, the third conductive contact contacting the second gate structure.
15. The method of claim 14 , wherein top surfaces of the second conductive contact and the third conductive contact are level.
16. A method comprising:
forming a source region and a drain region on a substrate;
forming a gate structure over the substrate, the gate structure being between the source region and the drain region;
forming a dielectric layer over the source region and the drain region;
forming a first insulation layer over the gate structure, the first insulation layer having a top surface level with a top surface of the dielectric layer;
forming first openings in the dielectric layer to the source region and the drain region;
forming first conductive contacts in the first openings and electrically coupled to the source region and the drain region, top surfaces of the first conductive contacts being lower than a top surface of the dielectric layer;
forming a liner layer over the first conductive contacts, the dielectric layer, and the first insulation layer;
forming second insulation layers over the liner layer in the first openings, the second insulation layers having top surfaces level with the top surface of the dielectric layer; and
forming second conductive contacts in the second insulation layers, the second conductive contacts electrically coupled to the first conductive contacts.
17. The method of claim 16 further comprising:
forming a third conductive contact in the first insulation layer, the third conductive contact contacting the gate structure, top surfaces of the second conductive contact and the third conductive contacts being level.
18. The method of claim 16 , wherein a material composition of the first insulation layer is different from a material composition of the second insulation layers.
19. The method of claim 16 , wherein the first insulation layer comprises silicon nitride, and wherein the second insulation layers comprises silicon oxynitride, silicon carbide, or a combination thereof.
20. The method of claim 16 , wherein the second conductive contacts extend through the second insulation layers and the liner layer.