IP Library › Granted Patent US 12,094,792
Granted Patent B2
US 12,094,792 · App. 17/461,818 · Granted Sep 17, 2024

Package structure having lid with protrusion and manufacturing method thereof

Inventors: Kuan-Min Wang (Hsinchu, TW); Chang-Jung Hsueh (Taipei, TW); Jui-Chang Chuang (Hsinchu, TW); Wei-Hung Lin (Hsinchu County, TW); Kuo-Chin Chang (Chiayi, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L23/293H01L23/3142H01L2924/16153
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Quick Facts
Patent No.
US 12,094,792
App. No.
17/461,818
Granted
Sep 17, 2024
Kind
B2
Abstract

A semiconductor package includes a substrate, a semiconductor die, a lid, and an adhesive layer. The semiconductor die is attached to the substrate. The lid is over the semiconductor die and the substrate. The adhesive layer is sandwiched between the lid and the semiconductor die. The adhesive layer includes a metallic thermal interface material (TIM) layer and a polymeric TIM layer adjacent to the metallic TIM layer. The polymeric TIM layer is located on corners of the semiconductor die from a top view.

Claims (36)

1. A semiconductor package, comprising:

a substrate;

a semiconductor die attached to the substrate;

a lid over the semiconductor die and the substrate, wherein the lid comprises a body portion and a first protruding portion connected to the body portion, the first protruding portion is attached to the semiconductor die, an outer sidewall of the first protruding portion is aligned with a sidewall of the semiconductor die, and a material of the first protruding portion is the same as a material of the body portion; and

an adhesive layer sandwiched between the body portion of the lid and the semiconductor die, wherein the first protruding portion surrounds the adhesive layer.

2. The semiconductor package of claim 1 , wherein a Young's modulus of the first protruding portion ranges from about 15 GPa to about 150 GPa.

3. The semiconductor package of claim 1 , wherein a ratio of a width of the adhesive layer to a width of the first protruding portion ranges from about 9 to about 50.

4. The semiconductor package of claim 1 , wherein the first protruding portion is a continuous ring pattern from a top view.

5. The semiconductor package of claim 1 , wherein the first protruding portion is a discontinuous ring pattern from a top view.

6. The semiconductor package of claim 1 , wherein the lid further comprises a second protruding portion connected to the body portion, the second protruding portion is attached to the semiconductor die, the second protruding portion is spatially separated from the first protruding portion, and the first protruding portion laterally surrounds the adhesive layer.

7. The semiconductor package of claim 6 , wherein the first protruding portion surrounds the second protruding portion.

8. The semiconductor package of claim 1 , wherein the first protruding portion is spatially separated from the adhesive layer.

9. A manufacturing method of a semiconductor package, comprising:

providing a substrate;

bonding a semiconductor die to the substrate, wherein the semiconductor die comprises a semiconductor substrate;

forming an adhesive layer, comprising:

dispensing a gallium layer on the semiconductor die; and

forming a metallic thermal interface material (TIM) layer on the gallium layer, wherein the gallium layer and the metallic TIM layer expose a portion of the semiconductor substrate of the semiconductor die; and

attaching a lid to the semiconductor die and the substrate, wherein the lid comprises a body portion and a protruding portion connected to the body portion, the protruding portion is attached to the semiconductor die to surround the adhesive layer such that the adhesive layer is sandwiched between the body portion of the lid and the semiconductor die, an outer sidewall of the protruding portion is aligned with a sidewall of the semiconductor die, and a material of the protruding portion is the same as a material of the body portion.

10. The method of claim 9 , wherein forming the adhesive layer further comprises:

attaching a gold layer to the metallic TIM layer.

11. The method of claim 9 , wherein

the protruding portion of the lid is attached to the exposed portion of the semiconductor substrate.

12. The method of claim 9 , wherein the exposed portion of the semiconductor substrate is corners of the semiconductor substrate from a top view.

13. A semiconductor package, comprising:

a substrate;

a semiconductor die attached to the substrate;

a lid over the semiconductor die and the substrate, wherein the lid comprises a body portion and a first protruding portion connected to the body portion, the first protruding portion is attached to the semiconductor die, an outer sidewall of the first protruding portion is aligned with a sidewall of the semiconductor die, and a material of the first protruding portion is the same as a material of the body portion; and

an adhesive layer sandwiched between the body portion of the lid and the semiconductor die, wherein the adhesive layer comprises a first metal layer and a metallic thermal interface material (TIM) layer disposed on the first metal layer, and the first protruding portion surrounds the adhesive layer.

14. The semiconductor package of claim 13 , wherein the adhesive layer further comprises a second metal layer disposed on the metallic TIM layer, and a material of the first metal layer is different from a material of the second metal layer.

15. The semiconductor package of claim 14 , wherein the first metal layer comprises gallium and the second metal layer comprises gold.

16. The semiconductor package of claim 14 , wherein sidewalls of the first metal layer, sidewalls of the metallic TIM layer, and sidewalls of the second metal layer are aligned.

17. The semiconductor package of claim 13 , wherein the metallic TIM layer comprises solder, tin, bismuth, lead, cadmium, zinc, gallium, indium, tellurium, mercury, thallium, antimony, selenium, polonium, or a combination thereof.

18. The semiconductor package of claim 13 , wherein the adhesive layer further comprises a polymeric TIM layer disposed adjacent to the first metal layer and the metallic TIM layer.

19. The semiconductor package of claim 18 , wherein the polymeric TIM layer comprises acetal, acrylic, cellulose, acetate, polyethylene, polystyrene, vinyl, nylon, polyolefin, polyester, silicone, paraffin, or a combination thereof.

20. The semiconductor package of claim 13 , wherein the lid further comprises a second protruding portion connected to the body portion, the second protruding portion is attached to the semiconductor die, the second protruding portion is spatially separated from the first protruding portion, and the first protruding portion laterally surrounds the adhesive layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2021
From: WANG, KUAN-MIN; HSUEH, CHANG-JUNG; CHUANG, JUI-CHANG; LIN, WEI-HUNG; CHANG, KUO-CHIN
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 057482/0707 →
Continuity (1)
Related Publication 20230065147A1 · Mar 2, 2023
Cited By (1)
US 12,751,321