Semiconductor package and method of fabricating semiconductor package
A method of fabricating a semiconductor package includes providing a substrate having at least one contact and forming a redistribution layer on the substrate. The formation of the redistribution layer includes forming a dielectric material layer over the substrate and performing a double exposure process to the dielectric material layer. A development process is then performed and a dual damascene opening is formed in the dielectric material layer. A seed metallic layer is formed over the dual damascene opening and over the dielectric material layer. A metal layer is formed over the seed metallic layer. A redistribution pattern is formed in the first dual damascene opening and is electrically connected with the at least one contact.
1. A method of forming a semiconductor structure, comprising:
providing a substrate having at least one contact therein and a dielectric material layer thereon;
performing a double exposure process to the dielectric material layer including sequentially performing a first exposure process to form first exposure portions in the dielectric material layer and performing a second exposure process to form second exposure portions in the dielectric material layer;
performing a development process to dissolve the first and second exposure portions and over-develop the dielectric material layer to form a dual damascene opening with a via opening and a trench opening communicated with the via opening, wherein a slant sidewall of the via opening is connected with a slant sidewall of the trench opening, and the slant sidewall of the via opening has the same slope as the slant sidewall of the trench opening;
forming a seed metallic layer into the dual damascene opening and over the dielectric material layer; and
forming a metallic pattern filled in the dual damascene opening.
2. The method as claimed in claim 1 , wherein the first exposure portions are formed with a first depth in the dielectric material layer and the second exposure portions are formed with a second depth in the dielectric material layer, and the first depth is larger than the second depth.
3. The method as claimed in claim 2 , wherein locations of the first exposure portions are overlapped with locations of the second exposure portions.
4. The method as claimed in claim 1 , wherein the first exposure process is performed with a first energy dose and the second exposure process is performed with a second energy dose, and the first energy dose is larger than the second energy dose.
5. The method as claimed in claim 1 , wherein the via opening exposes the at least one contact.
6. The method as claimed in claim 5 , wherein forming a metallic pattern in the dual damascene opening includes forming a via portion located within the via opening and forming a routing portion located within the trench opening.
7. The method as claimed in claim 5 , the seed metallic layer is formed to cover the at least one contact exposed by the via opening.
8. The method as claimed in claim 1 , wherein forming a metallic pattern comprises forming a metallic layer filling the dual damascene opening, and performing a planarization process to remove the metallic layer and the seed metallic layer outside the dual damascene opening.
9. The method as claimed in claim 1 , wherein performing the development process further comprising performing a curing process.
10. The method as claimed in claim 1 , wherein the seed metallic layer is formed conformally covering the via opening and the trench opening.
11. A method of forming a semiconductor structure, comprising:
providing a substrate having at least one contact therein and a dielectric material layer thereon;
performing a double exposure process to the dielectric material layer including sequentially performing a first exposure process to form first exposure portions in the dielectric material layer and performing a second exposure process to form second exposure portions in the dielectric material layer;
performing a development process to dissolve the first and second exposure portions and over-develop the dielectric material layer by removing the dielectric material layer around the first exposure portions and the second exposure portions to form a dual damascene opening with a via opening and a trench opening;
forming a seed metallic layer over the dual damascene opening and over the dielectric material layer; and
forming a metallic pattern filled in the dual damascene opening and electrically connected with the at least one contact.
12. The method as claimed in claim 11 , wherein the first exposure portions are formed with a first depth in the dielectric material layer and the second exposure portions are formed with a second depth in the dielectric material layer, and the first depth is larger than the second depth.
13. The method as claimed in claim 12 , wherein locations of the first exposure portions are overlapped with locations of the second exposure portions.
14. The method as claimed in claim 11 , wherein the first exposure process is performed with a first energy dose and the second exposure process is performed with a second energy dose, and the first energy dose is larger than the second energy dose.
15. The method as claimed in claim 11 , wherein the via opening exposes the at least one contact and the trench opening is connected with the at least one via opening.
16. The method as claimed in claim 15 , wherein forming a metallic pattern in the dual damascene opening includes forming a via portion located within the via opening and forming a routing portion located within the trench opening.
17. The method as claimed in claim 11 , wherein forming a metallic pattern comprises forming a metallic layer filling the dual damascene opening, and performing a planarization process to remove the metallic layer and the seed metallic layer outside the dual damascene opening.
18. A method of forming a redistribution layer, comprising:
forming a dielectric material layer;
performing a first exposure process to form first exposure portions with a first depth in the dielectric material layer;
performing a second exposure process to form second exposure portions with a second depth in the dielectric material layer, wherein the first depth is larger than the second depth;
performing a development process using a developer solution to remove the first exposure portions and the second exposure portions and over-develop the dielectric material layer in the same development process by removing portions of the dielectric material layer around the first exposure portions and the second exposure portions to form via openings and trench openings;
forming a seed metallic layer over the dielectric material layer and covering the via openings and trench openings; and
forming metal patterns on the seed metallic layer and filled within the via openings and the trench openings.
19. The method as claimed in claim 18 , wherein performing the development process further comprising performing a curing process.
20. The method as claimed in claim 18 , wherein the first exposure portions are formed at locations overlapped with locations of the second exposure portions.