IP Library › Granted Patent US 12,137,545
Granted Patent B2
US 12,137,545 · App. 17/932,765 · Granted Nov 5, 2024

Electromagnetic shield of an integrated circuit package

Inventors: See Yun Yow (Singapore, SG); Kah Hoe Ng (Singapore, SG); Chien-Shuo Tang (Singapore, SG)
Assignee: Hewlett Packard Enterprise Development LP
H05K9/0088H01L23/473H02M7/003H05K7/20281
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Quick Facts
Patent No.
US 12,137,545
App. No.
17/932,765
Granted
Nov 5, 2024
Kind
B2
Abstract

Example implementations relate to an integrated circuit (IC) package, an electronic device having the IC package, and a method of assembling the IC package to a printed circuit board (PCB) of the electronic device. The IC package includes a substrate, a chip, and an electromagnetic shield. The chip is coupled to the substrate. The electromagnetic shield is coupled to the substrate such that the chip is enclosed between the substrate and the electromagnetic shield. The electromagnetic shield includes a ferromagnetic material. Further, the electromagnetic shield protrudes beyond the substrate and is electrically grounded to the PCB to prevent an electromagnetic interference (EMI) noise from radiating through the IC package.

Claims (31)

1. An integrated circuit (IC) package comprising:

a substrate;

a chip coupled to the substrate; and

an electromagnetic shield comprising a cover portion and sidewall portions extending from the cover portion, wherein the sidewall portions are coupled to peripheral end portions of the substrate such that the chip is enclosed between the substrate and the electromagnetic shield, wherein the electromagnetic shield comprises a ferromagnetic material, and wherein the electromagnetic shield protrudes beyond the substrate and is electrically grounded to a printed circuit board of an electronic device to prevent electromagnetic interference (EMI) noise from radiating through the IC package.

2. The IC package of claim 1 , further comprising a thermal interface material (TIM) disposed between the chip and a first section in the cover portion of the electromagnetic shield, and wherein the chip is thermally coupled to the first section via the TIM to dissipate heat from the chip to the electromagnetic shield.

3. The IC package of claim 2 , wherein the TIM comprises a ferromagnetic material to further prevent EMI noise from radiating through the IC package.

4. The IC package of claim 2 , wherein a second section in the cover portion has a plurality of apertures to further dissipate the heat from the chip to a cooling fluid.

5. The IC package of claim 4 , wherein each aperture of the plurality of apertures has a diameter of about 0.5 millimeters (mm) to about 3 mm.

6. The IC package of claim 1 , wherein the sidewall portions of the electromagnetic shield protrude through through-vias of the printed circuit board and are soldered to grounding pins in the through-vias to electrically ground the electromagnetic shield to the printed circuit board through the through-vias.

7. The IC package of claim 1 , wherein the sidewall portions of the electromagnetic shield are disposed on the printed circuit board and soldered to grounding pins of the printed circuit board to electrically ground the electromagnetic shield to the printed circuit board.

8. The IC package of claim 1 , further comprising electrical contacts coupled to the chip and protruded from the substrate, wherein the substrate is soldered to the printed circuit board via the electrical contacts, and wherein the electrical contacts are one of solder balls of a ball grid array package, sockets of a land grid array package, or pins of a pin grid array package.

9. An electronic device, comprising:

a printed circuit board; and

an integrated circuit (IC) package mounted on the printed circuit board, wherein the IC package comprises:

a substrate coupled to the printed circuit board;

a chip coupled to the substrate; and

an electromagnetic shield comprising a cover portion and sidewall portions extending from the cover portion, wherein the sidewall portions are coupled to peripheral end portions of the substrate such that the chip is enclosed between the substrate and the electromagnetic shield, wherein the electromagnetic shield comprises a ferromagnetic material, and wherein the electromagnetic shield protrudes beyond the substrate and is electrically grounded to the printed circuit board to prevent electromagnetic interference (EMI) noise from radiating through the IC package.

10. The electronic device of claim 9 , wherein the IC package further comprises a thermal interface material (TIM) disposed between the chip and a first section in the cover portion of the electromagnetic shield, and wherein the chip is thermally coupled to the first section via the TIM to dissipate heat from the chip to the electromagnetic shield.

11. The electronic device of claim 10 , wherein the TIM comprises a ferromagnetic material to further prevent EMI noise from radiating through the IC package.

12. The electronic device of claim 10 , wherein a second section in the cover portion has a plurality of apertures to further dissipate the heat from the chip to a cooling fluid, and wherein each aperture of the plurality of apertures has a diameter of about 0.5 millimeters (mm) to about 3 mm.

13. The electronic device of claim 10 , further comprising a heat sink thermally coupled to the electromagnetic shield to further dissipate the heat from the electromagnetic shield to a cooling fluid.

14. The electronic device of claim 10 , wherein the sidewall portions of the electromagnetic shield protrude through through-vias of the printed circuit board and are soldered to grounding pins in the through-vias to electrically ground the electromagnetic shield to the printed circuit board through the through-vias.

15. The electronic device of claim 9 , wherein the sidewall portions of the electromagnetic shield are disposed on the printed circuit board and soldered to grounding pins of the printed circuit board to electrically ground the electromagnetic shield to the printed circuit board.

16. The electronic device of claim 10 , wherein the IC package further comprises electrical contacts coupled to the chip and protruded from the substrate, wherein the substrate is soldered to the printed circuit board via the electrical contacts, and wherein the electrical contacts are one of solder balls of a ball grid array package, sockets of a land grid array package, or pins of a pin grid array package.

17. A method comprising:

coupling sidewall portions of an electromagnetic shield comprising a ferromagnetic material to peripheral end portions of a substrate of an integrated circuit (IC) package such that a chip of the IC package is enclosed between the electromagnetic shield and the substrate, and the electromagnetic shield is protruded beyond the substrate, wherein the chip is mounted on and coupled to the substrate;

coupling the substrate to a printed circuit board of an electronic device; and

electrically grounding the electromagnetic shield to the printed circuit board to prevent electromagnetic interference (EMI) noise from radiating through the IC package.

18. The method of claim 17 , wherein coupling the electromagnetic shield to the substrate further comprises thermally coupling a first section in a cover portion of the electromagnetic shield to the chip via a thermal interface material (TIM) to dissipate heat from the chip to the electromagnetic shield, and wherein the TIM comprises a ferromagnetic material to further prevent EMI noise from radiating through the IC package.

19. The method of claim 18 , wherein a second section in the cover portion has a plurality of apertures to further dissipate the heat from the chip to a cooling fluid, and wherein each aperture of the plurality of apertures has a diameter of about 0.5 millimeters (mm) to about 3 mm.

20. The method of claim 18 , wherein coupling the substrate to the printed circuit board comprises soldering electrical contacts of the IC package coupled to the chip and protruded from the substrate to the printed circuit board, and wherein the electrical contacts are one of solder balls of a ball grid array package, sockets of a land grid array package, or pins of a pin grid array package.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2022
From: YOW, SEE YUN; NG, KAH HOE; TANG, CHIEN-SHUO
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 061120/0305 →
Continuity (1)
Related Publication 20240098952A1 · Mar 21, 2024
Cited By (1)
US 12,648,446