IP Library › Granted Patent US 12,148,733
Granted Patent B2
US 12,148,733 · App. 17/530,481 · Granted Nov 19, 2024

Shift control method in manufacture of semiconductor device

Inventors: Chih-Wei Wu (Yilan County, TW); Ying-Ching Shih (Hsinchu, TW); Hsien-Ju Tsou (Taipei, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L24/96H01L21/561H01L21/568H01L21/78H01L22/20H01L22/26H01L23/544H01L22/12H01L2223/54426H01L2224/95001H01L2224/95121
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Quick Facts
Patent No.
US 12,148,733
App. No.
17/530,481
Granted
Nov 19, 2024
Kind
B2
Abstract

A shift control method in manufacture of semiconductor device includes at least the following step. A plurality of semiconductor dies is encapsulated with an insulating encapsulation over a carrier, where at least portions of the plurality of semiconductor dies are shifted after encapsulating. A lithographic pattern is formed at least on the plurality of semiconductor die, where forming the lithographic pattern includes compensating for a shift in a position of the portions of the plurality of semiconductor dies.

Claims (60)

1. A shift control method in manufacture of semiconductor device, comprising:

placing a plurality of semiconductor dies over a carrier, wherein an overlay offset is between a first target of one of the plurality of semiconductor dies and a second target of the one of the plurality of semiconductor dies, the first target and the second target are stacked upon one another, and the overlay offset is compensated when placing the one of the plurality of semiconductor dies over the carrier;

encapsulating the plurality of semiconductor dies with an insulating encapsulation over the carrier, wherein at least portions of the plurality of semiconductor dies are shifted after encapsulating; and

forming a lithographic pattern at least on the plurality of semiconductor dies, wherein forming the lithographic pattern comprises compensating for a shift in a position of the portions of the plurality of semiconductor dies.

2. The shift control method in manufacture of semiconductor device of claim 1 , further comprising:

measuring the shift in the position of the portions of the plurality of semiconductor dies to result in a measuring result before forming the lithographic pattern; and

feeding back the measuring result to a lithographic tool utilized to form the lithographic pattern.

3. The shift control method in manufacture of semiconductor device of claim 2 , wherein measuring the shift in the position of the portions of the plurality of semiconductor dies comprises:

setting a reference coordinate to map the portions of the plurality of semiconductor dies, wherein an origin of the reference coordinate is aligned with one of the portions of the plurality of semiconductor dies.

4. The shift control method in manufacture of semiconductor device of claim 1 , further comprising:

scanning a semiconductor wafer to capture an image of the semiconductor wafer; and

performing a singulation process on the semiconductor wafer to form the plurality of semiconductor dies before placing the plurality of semiconductor dies over the carrier.

5. The shift control method in manufacture of semiconductor device of claim 1 , further comprising:

measuring the overlay offset of the one of the plurality of semiconductor dies before singulating the one of the plurality of semiconductor dies from a semiconductor wafer.

6. The shift control method in manufacture of semiconductor device of claim 5 , wherein:

the first target is a conductive pad of the one of the plurality of semiconductor dies, and the second target is a conductive connector of the one of the plurality of semiconductor dies disposed on the conductive pad, and

measuring the overlay offset comprises calculating a difference of relative position between the conductive connector and the conductive pad relative to a reference mark on the one of the plurality of semiconductor dies.

7. The shift control method in manufacture of semiconductor device of claim 1 , further comprising:

releasing the carrier; and

performing a singulation process to cut through the insulating encapsulation and the redistribution structure underlying the insulating encapsulation.

8. A shift control method in manufacture of semiconductor device, comprising:

performing an overlay measurement on a plurality of die regions of a semiconductor wafer, wherein each of the plurality of die regions comprises a conductive pad and a conductive connector formed on the conductive pad;

performing a singulation process on the semiconductor wafer to form a plurality of semiconductor die;

placing the plurality of semiconductor dies on a carrier, wherein placing the plurality of semiconductor dies on the carrier comprises performing an overlay feedback correction in response to the overlay measurement;

forming an insulating encapsulation on the carrier to cover the plurality of semiconductor dies;

performing a shift measurement on the plurality of semiconductor dies after forming the insulating encapsulation; and

forming a redistribution structure on the plurality of semiconductor dies and the insulating encapsulation, wherein a shifting feedback correction is performed in response to the shift measurement when forming the redistribution structure.

9. The shift control method in manufacture of semiconductor device of claim 8 , wherein performing the overlay measurement comprises:

scanning the semiconductor wafer to capture an image of the semiconductor wafer.

10. The shift control method in manufacture of semiconductor device of claim 8 , wherein performing the overlay measurement comprises:

calculating a difference of relative position between the conductive connector and the conductive pad relative to a reference mark on one of the plurality of semiconductor dies.

11. The shift control method in manufacture of semiconductor device of claim 8 , wherein forming the insulating encapsulation comprises:

performing a molding process to encapsulate the plurality of semiconductor dies with an insulating material;

curing the insulating material, wherein during the curing, the plurality of semiconductor dies are shifted from first position to second positions; and

planarizing the insulating material to form the insulating encapsulation laterally covering the plurality of semiconductor dies.

12. The shift control method in manufacture of semiconductor device of claim 8 , wherein performing the shift measurement comprises:

setting one of the plurality of the semiconductor dies as a reference point; and

determining a relative displacement of the plurality of the semiconductor dies relative to the reference point.

13. The shift control method in manufacture of semiconductor device of claim 8 , wherein forming the redistribution structure comprises:

performing a lithography process to form a dielectric layer with openings on the plurality of the semiconductor dies and the insulating encapsulation, wherein the openings of the dielectric layer accessibly expose at least a portion of conductive connectors of the plurality of the semiconductor dies, and the shifting feedback correction is performed when performing the lithography process.

14. The shift control method in manufacture of semiconductor device of claim 8 , further comprising:

releasing the carrier; and

performing another singulation process to cut through the insulating encapsulation and the redistribution structure underlying the insulating encapsulation.

15. A shift control method in manufacture of semiconductor device, comprising:

placing a plurality of semiconductor dies at first positions over a carrier in response to an overlay offset of the respective semiconductor die, wherein before placing one of the plurality of semiconductor dies, measuring a degree of offset of a conductive connector of the one of the plurality of semiconductor dies from a conductive pad of the one of the plurality of semiconductor dies, and the conductive connector is stacked upon the conductive pad;

forming an insulating encapsulation on the carrier to encapsulate the plurality of semiconductor dies, wherein a portion of the plurality of semiconductor dies is shifted from the first positions to second positions; and

post processing the plurality of semiconductor dies to form a semiconductor device.

16. The shift control method in manufacture of semiconductor device of claim 15 , wherein forming the insulating encapsulation on the carrier to encapsulate the plurality of semiconductor dies comprises:

performing a molding process to encapsulate the plurality of semiconductor dies with an insulating material;

curing the insulating material, wherein during the curing, the portion of the plurality of semiconductor dies is shifted from the first positions to the second positions; and

planarizing the insulating material to form the insulating encapsulation.

17. The shift control method in manufacture of semiconductor device of claim 15 , wherein placing the one of the plurality of semiconductor dies comprises:

positioning the one of the plurality of semiconductor dies at the first position to compensate for the degree of offset of the conductive connector from the conductive pad.

18. The shift control method in manufacture of semiconductor device of claim 15 , further comprising:

measuring a shift of the portion of the plurality of semiconductor dies after forming the insulating encapsulation.

19. The shift control method in manufacture of semiconductor device of claim 18 , wherein measuring the shift of the portion of the plurality of semiconductor dies comprises:

aligning one of the plurality of semiconductor dies with an origin of a reference coordinate, wherein the reference coordinate is mapped on the portion of the plurality of semiconductor dies; and

determining a relative displacement between other ones of the portion of the plurality of semiconductor dies relative to the one of the plurality of semiconductor dies.

20. The shift control method in manufacture of semiconductor device of claim 18 , wherein post processing the plurality of semiconductor dies comprises:

forming a lithographic pattern on the portion of the plurality of semiconductor dies in response to the shift of the portion of the plurality of semiconductor dies.

Continuity (2)
Division 16572628 · Sep 17, 2019
Related Publication 20220077108A1 · Mar 10, 2022