IP Library Granted Patent US 12,155,381
Granted Patent B2
US 12,155,381 · App. 18/104,409 · Granted Nov 26, 2024

Dynamic body biasing for radio frequency (RF) switch

Inventors: Ravi Pramod Kumar Vedula (San Diego, CA); Abhijeet Paul (Escondido, CA); Hyunchul Jung (San Diego, CA)
Assignee: QUALCOMM INCORPORATED
H03K17/6872H03K17/6874H03K2217/0036
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Quick Facts
Patent No.
US 12,155,381
App. No.
18/104,409
Granted
Nov 26, 2024
Kind
B2
Abstract

A radio frequency (RF) device is described. The RF device includes a switch field effect transistor (FET), having a source region, a drain region, a body region, and a gate region. The RF device also includes a dynamic bias control circuit. The dynamic bias control circuit includes a first transistor coupled to the gate region of the switch FET by a gate resistor. The dynamic bias control circuit also includes a second transistor coupled to the first transistor and coupled to the body region of the switch FET by a body resistor. The dynamic bias control circuit further includes a capacitor coupled to the body region of the switch FET by the body resistor, and the gate region of the switch FET, by the gate resistor.

Claims (50)

1. A radio frequency (RF) device, comprising:

a switch field effect transistor (FET) including a source region, a drain region, a body region, and a gate region; and

a dynamic bias control circuit comprising:

a first transistor coupled to the gate region of the switch FET by a gate resistor;

a second transistor coupled to the first transistor and coupled to the body region of the switch FET by a body resistor; and

a capacitor coupled to the body region of the switch FET by the body resistor, and the gate region of the switch FET, by the gate resistor.

2. The RF device of claim 1 , in which the first transistor comprises:

an N-channel metal oxide semiconductor (NMOS) transistor, comprising:

an NMOS source terminal coupled to the gate region of the switch FET by the gate resistor and coupled to a first terminal of the capacitor;

an NMOS drain terminal coupled to the second transistor;

an NMOS body terminal coupled to the second transistor and coupled to the NMOS drain terminal; and

an NMOS gate terminal coupled to the second transistor.

3. The RF device of claim 2 , in which the NMOS gate terminal is coupled to the body region of the switch FET by the body resistor and coupled to a second terminal of the capacitor.

4. The RF device of claim 2 , in which the second transistor comprises:

a P-channel metal oxide semiconductor (PMOS) transistor, comprising:

a PMOS source terminal coupled to the body region of the switch FET by the body resistor;

a PMOS drain terminal coupled to the NMOS drain terminal and the NMOS body terminal;

a PMOS body terminal coupled to the NMOS transistor; and

a PMOS gate terminal coupled to the NMOS transistor.

5. The RF device of claim 4 , in which the PMOS source terminal is coupled to a second terminal of the capacitor and coupled to the NMOS gate terminal.

6. The RF device of claim 4 , in which the PMOS drain terminal is coupled to the NMOS body terminal and coupled to the PMOS body terminal.

7. The RF device of claim 4 , in which the PMOS body terminal is coupled to the NMOS body terminal and coupled to the NMOS drain terminal and the PMOS drain terminal.

8. The RF device of claim 4 , in which the PMOS gate terminal is coupled to the NMOS source terminal and the gate region of the switch FET by the gate resistor, and coupled to the first terminal of the capacitor.

9. The RF device of claim 4 , in which the NMOS gate terminal is coupled to the PMOS source terminal and the body region of the switch FET by the body resistor, and coupled to a second terminal of the capacitor.

10. The RF device of claim 1 , integrated in an RF front end module, the RF front end module incorporated in at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, a mobile phone, and a portable computer.

11. A method of constructing a radio frequency integrated circuit (RFIC) having a switch field effect transistor (FET), the method comprising:

tying a gate region to a body region of the switch FET; and

forming a dynamic bias control circuit between the gate region and the body region of the switch FET, in which the dynamic bias control circuit comprises:

a first transistor coupled to the gate region of the switch FET by a gate resistor;

a second transistor coupled to the first transistor and coupled to the body region of the switch FET by a body resistor; and

a capacitor coupled to the body region of the switch FET by the body resistor, and the gate region of the switch FET, by the gate resistor.

12. The method of claim 11 , in which the first transistor comprises:

an N-channel metal oxide semiconductor (NMOS) transistor, comprising:

an NMOS source terminal coupled to the gate region of the switch FET by the gate resistor and coupled to a first terminal of the capacitor;

an NMOS drain terminal coupled to the second transistor;

an NMOS body terminal coupled to the second transistor and coupled to the NMOS drain terminal; and

an NMOS gate terminal coupled to the second transistor.

13. The method of claim 12 , in which the NMOS gate terminal is coupled to the body region of the switch FET by the body resistor and coupled to a second terminal of the capacitor.

14. The method of claim 12 , in which the second transistor comprises:

a P-channel metal oxide semiconductor (PMOS) transistor, comprising:

a PMOS source terminal coupled to the body region of the switch FET by the body resistor;

a PMOS drain terminal coupled to the NMOS drain terminal and the NMOS body terminal;

a PMOS body terminal coupled to the NMOS transistor; and

a PMOS gate terminal coupled to the NMOS transistor.

15. The method of claim 14 , in which the PMOS source terminal is coupled to a second terminal of the capacitor and coupled to the NMOS gate terminal.

16. The method of claim 14 , in which the PMOS drain terminal is coupled to the NMOS body terminal and coupled to the PMOS body terminal.

17. The method of claim 14 , in which the PMOS body terminal is coupled to the NMOS body terminal and coupled to the NMOS drain terminal and the PMOS drain terminal.

18. The method of claim 14 , in which the PMOS gate terminal is coupled to the NMOS source terminal and the gate region of the switch FET by the gate resistor, and coupled to the first terminal of the capacitor.

19. The method of claim 14 , in which the NMOS gate terminal is coupled to the PMOS source terminal and the body region of the switch FET by the body resistor, and coupled to a second terminal of the capacitor.

20. The method of claim 11 , further comprising integrating the RFIC in an RF front end module, the RF front end module incorporated in at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, a mobile phone, and a portable computer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2023
From: VEDULA, RAVI PRAMOD KUMAR; PAUL, ABHIJEET; JUNG, HYUNCHUL
To: QUALCOMM INCORPORATED
Reel/Frame 063072/0886 →
Continuity (2)
Continuation In Part 17892800 · Aug 22, 2022
Related Publication 20240063790A1 · Feb 22, 2024