Display system and electronic device
View Patent ↗Provided is a display system with high display quality and high resolution. The display system includes a first layer and a display portion. The display portion is positioned in a region overlapping with the first layer. The first layer includes a semiconductor substrate containing silicon as a material, and a plurality of first transistors and a plurality of second transistors whose channel formation regions contain silicon are formed over the semiconductor substrate. The first layer includes a first circuit and a second circuit; the first circuit includes a driver circuit for driving the display portion; and the second circuit includes a memory device, a GPU, and an EL correction circuit. The display portion includes a pixel, and the pixel includes a light-emitting device containing organic EL and is electrically connected to the driver circuit. The memory device has a function of retaining image data; the GPU has a function of decoding the image data read from the memory device; and the EL correction circuit has a function of correcting light emitted from the light-emitting device.
1. An electronic device comprising:
a first layer;
a second layer over the first layer; and
a display portion over the second layer,
wherein the display portion and the first layer overlap with each other,
wherein the second layer and the first layer overlap with each other,
wherein the first layer comprises a semiconductor substrate comprising silicon,
wherein the first layer comprises a plurality of first transistors and a plurality of second transistors whose channel formation regions comprise silicon in the semiconductor substrate,
wherein the second layer comprises a plurality of third transistors whose channel formation regions comprise an oxide semiconductor,
wherein the first layer comprises a first circuit and a second circuit,
wherein the first circuit comprises a source driver circuit and a gate driver circuit each comprising any of the plurality of first transistors,
wherein the second circuit comprises a memory device, a GPU, an EL correction circuit, and a timing controller each comprising any of the plurality of second transistors,
wherein the display portion comprises a pixel,
wherein the pixel comprises a light-emitting device,
wherein the pixel is electrically connected to the source driver circuit and the gate driver circuit,
wherein the memory device is configured to retain image data,
wherein the GPU is configured to decode the image data read from the memory device,
wherein the source driver circuit is configured to transmit the decoded image data to the pixel,
wherein the EL correction circuit is configured to correct luminance of light emitted from the light-emitting device, and
wherein the timing controller is configured to increase or decrease a frame rate at which an image is displayed on the display portion.
2. The electronic device according to claim 1 , wherein the plurality of third transistors are included in memory cells, respectively.
3. The display system electronic device according to claim 1 ,
wherein the second circuit comprises a CPU comprising any of the plurality of second transistors, and
wherein the CPU is configured to transmit a control signal to one or more selected from the memory device, the GPU, the EL correction circuit, and the timing controller.
4. The electronic device according to claim 3 , wherein the GPU is configured to perform an arithmetic operation of an artificial neural network and correct an image displayed on the display portion on the basis of a result of the arithmetic operation.
5. The electronic device according to claim 1 , wherein the electronic device is a head-mounted display.
6. The electronic device according to claim 1 , wherein the display portion comprises a plurality of fourth transistors which are different from the plurality of third transistors.
7. An electronic device comprising:
a first layer;
a second layer over the first layer; and
a display portion over the second layer,
wherein the display portion and the first layer overlap with each other,
wherein the second layer and the first layer overlap with each other,
wherein the first layer comprises a semiconductor substrate comprising silicon,
wherein the first layer comprises a plurality of first transistors and a plurality of second transistors whose channel formation regions comprise silicon in the semiconductor substrate,
wherein the second layer comprises a plurality of third transistors whose channel formation regions comprise an oxide semiconductor,
wherein a first circuit comprises a source driver circuit and a gate driver circuit,
wherein the source driver circuit and the gate driver circuit each comprise any of the plurality of first transistors,
wherein a second circuit comprises a memory device, a GPU, an EL correction circuit, and a timing controller,
wherein the GPU, the EL correction circuit, and the timing controller each comprise any of the plurality of second transistors,
wherein the memory device comprises any of the plurality of second transistors and any of the plurality of third transistors,
wherein the display portion comprises a pixel,
wherein the pixel comprises a light-emitting device, and
wherein the pixel is electrically connected to the source driver circuit and the gate driver circuit.
8. The electronic device according to claim 7 ,
wherein the memory device is configured to retain image data,
wherein the GPU is configured to decode the image data read from the memory device,
wherein the source driver circuit is configured to transmit the decoded image data to the pixel,
wherein the EL correction circuit is configured to correct luminance of light emitted from the light-emitting device, and
wherein the timing controller is configured to increase or decrease a frame rate at which an image is displayed on the display portion.
9. The electronic device according to claim 7 ,
wherein the second circuit comprises a CPU comprising any of the plurality of second transistors, and
wherein the CPU is configured to transmit a control signal to one or more selected from the memory device, the GPU, the EL correction circuit, and the timing controller.
10. The electronic device according to claim 7 , wherein the GPU is configured to perform an arithmetic operation of an artificial neural network and correct an image displayed on the display portion on the basis of a result of the arithmetic operation.
11. The electronic device according to claim 7 , wherein the electronic device is a head-mounted display.
12. The electronic device according to claim 7 , wherein the display portion comprises a plurality of fourth transistors which are different from the plurality of third transistors.