Semiconductor device comprising operation circuits and a switch circuit
A semiconductor device having a novel structure is provided. The semiconductor device includes a plurality of operation circuits that can switch different kinds of operation processing; a plurality of switch circuits that can switch a connection state between the operation circuits; and a controller. The operation circuit includes a first memory that stores data corresponding to a weight parameter used in the plurality of kinds of operation processing. The operation circuit executes a product-sum operation by switching weight data in accordance with a context. The switch circuit includes a second memory that stores data for switching a plurality of connection states in response to switching of a second context signal. The controller generates a second context signal on the basis of a first context signal. The amount of data stored in the second memory can be smaller than the amount of data stored in the first memory in the operation circuit.
1. A semiconductor device comprising:
operation circuits; and
a switch circuit,
wherein each of the operation circuits comprises:
a memory circuit configured to store a plurality of weight data; and
a multiplier circuit configured to perform an operation based on an input data and one of the plurality of weight data selected by a first context signal,
wherein the memory circuit is formed in a first layer,
wherein the multiplier circuit is formed in a second layer,
wherein the switch circuit is configured to switch an electrical connection state between the operation circuits in accordance with a second context signal, and
wherein a number of second contexts switched on the basis of the second context signal is smaller than a number of first contexts switched on the basis of the first context signal.
2. The semiconductor device according to claim 1 , wherein the memory circuit comprises a transistor including an oxide semiconductor in a channel formation region.
3. An integrated circuit comprising:
a circuit portion comprising the semiconductor device according to claim 1 ; and a lead.
4. A semiconductor device comprising:
a controller;
operation circuits; and
a switch circuit,
wherein each of the operation circuits comprises:
a memory circuit configured to store a plurality of weight data; and
a multiplier circuit configured to perform an operation based on an input data and one of the plurality of weight data selected by a first context signal,
wherein the memory circuit is formed in a first layer,
wherein the multiplier circuit is formed in a second layer,
wherein the switch circuit is configured to switch an electrical connection state between the operation circuits in accordance with a second context signal,
wherein the controller is configured to generate the first context signal and the second context signal on the basis of a third context signal, and
wherein a number of second contexts switched on the basis of the second context signal is smaller than a number of first contexts switched on the basis of the first context signal.
5. The semiconductor device according to claim 4 , wherein the memory circuit comprises a transistor including an oxide semiconductor in a channel formation region.
6. An integrated circuit comprising:
a circuit portion comprising the semiconductor device according to claim 4 ; and a lead.