Data output buffer and semiconductor apparatus including the same
A data output buffer includes a first driver configured to drive a data input/output (I/O) pad according to an input signal and allow data drivability to be controlled according to an impedance calibration code and a second driver configured to perform a de-emphasis operation on the data I/O pad and allow de-emphasis drivability to be controlled according to the impedance calibration code.
1. A data output buffer comprising:
a first driver configured to directly receive an impedance calibration code, drive a data input/output (I/O) pad according to an input signal and allow data drivability to be controlled according to the impedance calibration code;
a second driver configured to directly receive emphasis signals, perform a de-emphasis operation on the data I/O pad and allow de-emphasis drivability to be controlled according to a selection code and the emphasis signals; and
a selection circuit configured to output one of a fixing code and the impedance calibration code as the selection code according to a selection signal,
wherein the first driver and the second driver are coupled to the data I/O pad directly.
2. The data output buffer of claim 1 , wherein the first driver includes:
a pull-up driver configured to drive the data I/O pad according to a first data signal of the input signal and allow the data drivability to be controlled according to a first impedance calibration code of the impedance calibration code; and
a pull-down driver configured to drive the data I/O pad according to a second data signal of the input signal and allow the data drivability to be controlled according to a second impedance calibration code of the impedance calibration code.
3. The data output buffer of claim 1 , wherein the second driver includes:
a pull-up driver configured to perform the de-emphasis operation according to a first emphasis signal of the emphasis signals and allow the de-emphasis drivability to be controlled according to all code bits of a first selection code of the selection code; and
a pull-down driver configured to perform the de-emphasis operation according to a second emphasis signal of the emphasis signals and allow the de-emphasis drivability to be controlled according to all code bits of a second selection code of the selection code.
4. The data output buffer of claim 1 , wherein the second driver includes:
a plurality of pull-up driving circuits configured to commonly receive a first emphasis signal the emphasis signals and receive all code bits of a first selection code of the selection code bit by bit, respectively; and
a plurality of pull-down driving circuits configured to commonly receive a second emphasis signal of the emphasis signals and receive all code bits of a second selection code of the selection code bit by bit, respectively.
5. The data output buffer of claim 1 , wherein the second driver includes:
a pull-up driver configured to perform the de-emphasis operation according to a first emphasis signal of the emphasis signals and allow the de-emphasis drivability to be controlled according to partial code bits of a first selection code of the selection code; and
a pull-down driver configured to perform the de-emphasis operation according to a second emphasis signal of the emphasis signals and allow the de-emphasis drivability to be controlled according to partial code bits of a second selection code of the selection code.
6. The data output buffer of claim 1 , wherein the second driver includes:
a plurality of pull-up driving circuits configured to commonly receive a first emphasis signal of the emphasis signals and receive partial code bits of a first selection code of the selection code bit by bit, respectively; and
a plurality of pull-down driving circuits configured to commonly receive a second emphasis signal of the emphasis signals and receive partial code bits of a second selection code of the selection code bit by bit, respectively.
7. The data output buffer of claim 2 , wherein the second driver includes:
a pull-up driver configured to perform the de-emphasis operation by raising a voltage level of the data I/O pad when the pull-down driver of the first driver drives the data I/O pad as a low level; and
a pull-down driver configured to perform the de-emphasis operation by lowering the voltage level of the data I/O pad when the pull-up driver of the first driver drives the data I/O pad as a high level.
8. A semiconductor apparatus comprising:
a memory region configured to output read data through a data input/output (I/O) pad according to a read command and configured to store write data that is input through the data I/O pad according to a write command;
an impedance calibration circuit configured to adjust a value of an impedance calibration code based on an impedance of an external resistor;
a first driver configured to directly receive the impedance calibration code. drive the data input/output (I/O) pad according to an input signal and allow data drivability to be controlled according to the impedance calibration code;
a second driver configured to directly receive emphasis signals, perform a de-emphasis operation on the data I/O pad and allow de-emphasis drivability to be controlled according to a selection code and the emphasis signals; and
a selection circuit configured to output one of a fixing code and the impedance calibration code as the selection code according to a selection signal,
wherein the first driver and the second driver are coupled to the data I/O pad directly.
9. The semiconductor apparatus of claim 8 , wherein the first driver includes:
a pull-up driver configured to drive the data I/O pad according to a first data signal of the input signal and allow the data drivability to be controlled according to a first impedance calibration code of the impedance calibration code; and
a pull-down driver configured to drive the data I/O pad according to a second data signal of the input signal and allow the data drivability to be controlled according to a second impedance calibration code of the impedance calibration code.
10. The semiconductor apparatus of claim 8 , wherein the second driver includes:
a pull-up driver configured to perform the de-emphasis operation according to a first emphasis signal of the emphasis signals and allow the de- emphasis drivability to be controlled according to all code bits or partial code bits of a first selection code of the selection code; and
a pull-down driver configured to perform the de-emphasis operation according to a second emphasis signal of the emphasis signals and allow the de-emphasis drivability to be controlled according to all code bits or partial code bits of a second selection code of the selection code.
11. The semiconductor apparatus of claim 8 , wherein the second driver includes:
a plurality of pull-up driving circuits configured to commonly receive a first emphasis signal of the emphasis signals and receive all code bits or partial code bits of a first selection code of the selection code bit by bit, respectively; and
a plurality of pull-down driving circuits configured to commonly receive a second emphasis signal of the emphasis signals and receive all code bits or partial code bits of a second selection code of the selection code bit by bit, respectively.
12. The semiconductor apparatus of claim 9 , wherein the second driver includes:
a pull-up driver configured to perform the de-emphasis operation by raising a voltage level of the data I/O pad when the pull-down driver of the first driver drives the data I/O pad as a low level; and
a pull-down driver configured to perform the de-emphasis operation by lowering the voltage level of the data I/O pad when the pull-up driver of the first driver drives the data I/O pad as a high level.