Solid-state image sensor and imaging device
Improved is performance of a solid-state image sensor that detects presence or absence of a photon. The solid-state image sensor includes a light-receiving substrate and a logic substrate. In the solid-state image sensor, there is disposed, on the light-receiving substrate, a plurality of avalanche photodiodes, each of the avalanche photodiodes generating a current corresponding to incident of a photon. Furthermore, in the solid-state image sensor, there is disposed, on the logic substrate, a counter that counts the number of photons on the basis of a current of a selected avalanche photodiode among the plurality of avalanche photodiodes.
1. A solid-state image sensor comprising:
a light-receiving substrate on which a plurality of avalanche photodiodes is disposed, each of the avalanche photodiodes generating a current corresponding to incidence of a photon; and
a logic substrate on which a counter is disposed, the counter counting a number of the photons on a basis of the current of a selected avalanche photodiode among the plurality of avalanche photodiodes, wherein
the plurality of avalanche photodiodes includes first and second avalanche photodiodes, and
there are further disposed, on the logic substrate, a detection circuit that generates a pulse signal on a basis of a voltage according to the current and outputs the pulse signal to the counter, a first selection transistor that opens and closes a path between one end of the first avalanche photodiode and the detection circuit, a second selection transistor that opens and closes a path between one end of the second avalanche photodiode and the detection circuit, and a control circuit that controls a voltage of each gate of the first and second selection transistors.
2. The solid-state image sensor according to claim 1 , wherein, in a case where at least one of the first and second selection transistors is in a closed state, the control circuit supplies the gate with a voltage higher than a difference between a potential of the one end after a potential drop due to the photon and each threshold voltage of the first and second selection transistors.
3. The solid-state image sensor according to claim 1 , wherein
the counter includes first and second counters,
the detection circuit includes a first detection circuit that generates a first pulse signal and supplies the first pulse signal to the first counter, and a second detection circuit that generates a second pulse signal and supplies the second pulse signal to the second counter,
the first selection transistor opens and closes a path between one end of the first avalanche photodiode and the first detection circuit,
the second selection transistor opens and closes a path between one end of the second avalanche photodiode and the second detection circuit,
there are further disposed, on the logic substrate, a third selection transistor that opens and closes a path between one end of the first avalanche photodiode and the second detection circuit, and a fourth selection transistor that opens and closes a path between one end of the second avalanche photodiode and the second detection circuit, and
the control circuit further controls voltage of each gate of the third and fourth selection transistors.
4. The solid-state image sensor according to claim 1 , wherein
the control circuit includes
an on-state voltage generation unit that generates a voltage according to a predetermined reference voltage as an on-state voltage, and
a selector that selects either an off-state voltage different from the on-state voltage or the on-state voltage, and supplies the selected voltage to the gate.
5. The solid-state image sensor according to claim 1 , wherein
the detection circuit includes a first detection circuit that generates a first pulse signal and a second detection circuit that generates a second pulse signal,
the first selection transistor opens and closes a path between one end of the first avalanche photodiode and the first detection circuit,
the second selection transistor opens and closes a path between one end of the second avalanche photodiode and the second detection circuit, and
there are further disposed, on the logic substrate, a first pulse-shaping circuit that shortens a pulse width of the first pulse signal, a second pulse-shaping circuit that shortens a pulse width of the second pulse signal, and a logical OR gate that supplies the counter with a logical OR of the first and second pulse signals having shortened pulse widths.
6. The solid-state image sensor according to claim 1 , wherein there is further disposed, on the logic substrate, a clip transistor that fixes a potential of the one end to a predetermined value.
7. An imaging device comprising the solid-state image sensor according to claim 1 .
8. The imaging device according to claim 7 , wherein,
in a case where at least one of the first and second selection transistors is in a closed state, the control circuit supplies the gate with a voltage higher than a difference between a potential of the one end after a potential drop due to the photon and each threshold voltage of the first and second selection transistors.
9. The imaging device according to claim 7 , wherein
the counter includes first and second counters,
the detection circuit includes a first detection circuit that generates a first pulse signal and supplies the first pulse signal to the first counter, and a second detection circuit that generates a second pulse signal and supplies the second pulse signal to the second counter,
the first selection transistor opens and closes a path between one end of the first avalanche photodiode and the first detection circuit,
the second selection transistor opens and closes a path between one end of the second avalanche photodiode and the second detection circuit,
there are further disposed, on the logic substrate, a third selection transistor that opens and closes a path between one end of the first avalanche photodiode and the second detection circuit, and a fourth selection transistor that opens and closes a path between one end of the second avalanche photodiode and the second detection circuit, and
the control circuit further controls voltage of each gate of the third and fourth selection transistors.
10. The imaging device according to claim 7 , wherein
the control circuit includes
an on-state voltage generation unit that generates a voltage according to a predetermined reference voltage as an on-state voltage, and
a selector that selects either an off-state voltage different from the on-state voltage or the on-state voltage, and supplies the selected voltage to the gate.
11. A solid-state image sensor comprising:
a light-receiving substrate on which a plurality of avalanche photodiodes is disposed, each of the avalanche photodiodes generating a current corresponding to incidence of a photon; and
a logic substrate on which a counter is disposed, the counter counting a number of the photons on a basis of the current of a selected avalanche photodiode among the plurality of avalanche photodiodes, wherein
the plurality of avalanche photodiodes includes first and second avalanche photodiodes,
there is further disposed, on the logic substrate, a detection circuit that generates a pulse signal on a basis of a voltage according to the current and outputs the pulse signal to the counter, and
there are further disposed, on the light-receiving substrate, a first selection transistor that opens and closes a path between one end of the first avalanche photodiode and the detection circuit, a second selection transistor that opens and closes a path between one end of the second avalanche photodiode and the detection circuit, and a clip transistor that fixes a potential of the one end to a predetermined value.
12. The solid-state image sensor according to claim 11 , wherein
there are further disposed, on the light-receiving substrate, a first resistor that is inserted between one end of the first avalanche photodiode and the first selection transistor, and a second resistor that is inserted between one end of the second avalanche photodiode and the second selection transistor.
13. An imaging device comprising the solid-state image sensor according to claim 11 .
14. A solid-state image sensor comprising:
a light-receiving substrate on which a plurality of avalanche photodiodes is disposed, each of the avalanche photodiodes generating a current corresponding to incidence of a photon;
a logic substrate on which a counter is disposed, the counter counting a number of the photons on a basis of the current of a selected avalanche photodiode among the plurality of avalanche photodiodes; and
an intermediate substrate, wherein
the plurality of avalanche photodiodes includes first and second avalanche photodiodes, and
there are further disposed, on the intermediate substrate, a first selection transistor that opens and closes a path between one end of the first avalanche photodiode and a common node, and a second selection transistor that opens and closes a path between one end of the second avalanche photodiode and the common node.
15. The solid-state image sensor according to claim 14 , wherein
there is further disposed, on the logic substrate,
a detection circuit that generates a pulse signal on a basis of a potential of the common node and outputs the pulse signal to the counter, and
there is further disposed, on the intermediate substrate, a clip transistor that fixes a potential of the one end to a predetermined value.
16. The solid-state image sensor according to claim 14 , wherein
there is further disposed, on the intermediate substrate, a detection circuit that generates a pulse signal on a basis of a potential of the common node and outputs the pulse signal to the counter.
17. The solid-state image sensor according to claim 14 , wherein
there are further disposed, on the light-receiving substrate, a first resistor that is inserted between one end of the first avalanche photodiode and the first selection transistor, and a second resistor that is inserted between one end of the second avalanche photodiode and the second selection transistor.
18. The solid-state image sensor according to claim 17 , wherein
there is further disposed, on the logic substrate,
a detection circuit that generates a pulse signal on a basis of a potential of the common node and outputs the pulse signal to the counter.
19. The solid-state image sensor according to claim 17 , wherein
there is further disposed, on the intermediate substrate, a detection circuit that generates a pulse signal on a basis of a potential of the common node and outputs the pulse signal to the counter.
20. An imaging device comprising the solid-state image sensor according to claim 14 .