Granted Patent B2

US 12,199,577 · App. 17/700,826 · Granted Jan 14, 2025

Inventors: Nadim Khlat (Cugnaux, FR); James M. Retz (Cedar Rapids, IA)

Assignee: Qorvo US, Inc.

H03F3/245H03F1/0227H03F1/3241H03F3/195H04B1/0475H03F2200/102H03F2200/451H04B2001/0408

Abstract

Claims (46)

1. A transmission circuit comprising:

a power amplifier circuit coupled to a transmitter circuit via a radio frequency (RF) front-end circuit and configured to amplify an RF signal based on a modulated voltage and provide the amplified RF signal to the RF front-end circuit;

an envelope tracking (ET) integrated circuit (ETIC) configured to generate the modulated voltage based on a modulated target voltage; and

a transceiver circuit comprising:

a signal processing circuit configured to generate the RF signal from a time-variant modulation vector; and

a target voltage circuit comprising:

an ET lookup table (LUT) circuit configured according to a selected frequency of the RF signal to generate the modulated target voltage as a function of the time-variant modulation vector; and

an equalizer circuit configured to apply an equalization filter to a selected form of the time-variant modulation vector to compensate for a complex nonlinear voltage distortion filter created on an output stage of the power amplifier circuit by coupling the power amplifier circuit with the RF front-end circuit across a modulation bandwidth comprising the selected frequency.

2. The transmission circuit of claim 1 , wherein the transceiver circuit further comprises a frequency equalizer configured to apply a frequency equalization filter to the time-variant modulation vector to generate an equalized time-variant modulation vector.

3. The transmission circuit of claim 2 , wherein the equalizer circuit is further configured to apply the equalization filter to the equalized time-variant modulation vector to generate a filtered time-variant modulation vector.

4. The transmission circuit of claim 3 , wherein the target voltage circuit further comprises a vector-to-real (V2R) converter coupled to the equalizer circuit and configured to extract a selected real parameter from the filtered time-variant modulation vector.

5. The transmission circuit of claim 4 , wherein the target voltage circuit further comprises a scaler coupled to the V2R converter and configured to scale the selected real parameter based on a scaling factor that is adapted according to an average power of the RF signal.

6. The transmission circuit of claim 4 , wherein the target voltage circuit further comprises a unit converter configured to convert the selected real parameter to a predefined parameter configured in the ET LUT circuit for generating the modulated target voltage.

7. The transmission circuit of claim 2 , wherein the equalization filter is expressed as: H EQ (s)=H ET (s), wherein:

H EQ (s) represents the equalization filter; and

H ET (s) represents a combined complex filter configured to match a combined signal path filter, the combined complex filter is expressed as: H ET (s)=H IQ (s)*H PA (s)*H IV (s), wherein:

H IQ (s) represents a transfer function of the signal processing circuit;

H PA (s) represents a voltage gain transfer function of the power amplifier circuit; and

H IV (s) represents the complex nonlinear voltage distortion filter created on the output stage of the power amplifier circuit by coupling the power amplifier circuit with the RF front-end circuit.

8. The transmission circuit of claim 7 , wherein the frequency equalization filter is expressed as H F (s)=[1/H ET (s)]*[1/H RF (s)], wherein:

H F (s) represents the frequency equalization filter; and

H RF (s) represents a transfer function of the RF front-end circuit.

9. The transmission circuit of claim 2 , wherein the signal processing circuit comprises:

a memory digital predistortion (mDPD) circuit configured to digitally pre-distort the equalized time-variant modulation vector to generate a pre-distorted time-variant modulation vector; and

a modulator circuit configured to generate the RF signal from the pre-distorted time-variant modulation vector and provide the RF signal to the power amplifier circuit.

10. The transmission circuit of claim 1 , wherein the transceiver circuit further comprises:

a first frequency equalizer circuit configured to apply a first frequency equalization filter to the time-variant modulation vector to generate a first equalized time-variant modulation vector; and

a second frequency equalizer circuit configured to apply a second frequency equalization filter to the first equalized time-variant modulation vector to generate a second equalized time-variant modulation vector.

11. The transmission circuit of claim 10 , wherein the equalizer circuit is further configured to apply the equalization filter to the first equalized time-variant modulation vector to generate a filtered time-variant modulation vector.

12. The transmission circuit of claim 11 , wherein the equalization filter is expressed as: H EQ (s)=1, wherein H EQ (s) represents the equalization filter.

13. The transmission circuit of claim 11 , wherein the target voltage circuit further comprises a vector-to-real (V2R) converter coupled to the equalizer circuit and configured to extract a selected real parameter from the filtered time-variant modulation vector.

14. The transmission circuit of claim 13 , wherein the target voltage circuit further comprises a scaler coupled to the V2R converter and configured to scale the selected real parameter based on a scaling factor that is adapted according to an average power of the RF signal.

15. The transmission circuit of claim 13 , wherein the target voltage circuit further comprises a unit converter configured to convert the selected real parameter to a predefined parameter configured in the ET LUT circuit for generating the modulated target voltage.

16. The transmission circuit of claim 10 , wherein:

the first frequency equalization filter is expressed as H F1 (s)=1/H RF (s), wherein:

H F1 (s) represents the first frequency equalization filter; and

H RF (s) represents a transfer function of the RF front-end circuit; and

the second frequency equalization filter is expressed as H F2 (s)=1/H ET (s), wherein:

H F2 (s) represents the second frequency equalization filter; and

H ET (s) represents a combined complex filter configured to match a combined signal path filter, the combined complex filter is expressed as: H ET (s)=H IQ (s)*H PA (s)*H IV (s), wherein:

H IQ (s) represents a transfer function of the signal processing circuit;

H PA (s) represents a voltage gain transfer function of the power amplifier circuit; and

H IV (s) represents the complex nonlinear voltage distortion filter created on the output stage of the power amplifier circuit by coupling the power amplifier circuit with the RF front-end circuit.

17. The transmission circuit of claim 16 , wherein the signal processing circuit comprises:

a memory digital predistortion (mDPD) circuit configured to digitally pre-distort the second equalized time-variant modulation vector to generate a pre-distorted time-variant modulation vector; and

a modulator circuit configured to generate the RF signal from the pre-distorted time-variant modulation vector and provide the RF signal to the power amplifier circuit.

Assignments (1)

Continuity (4)

References Cited (166)