IP Library › Granted Patent US 12,205,825
Granted Patent B2
US 12,205,825 · App. 17/706,792 · Granted Jan 21, 2025

Method of preparing semiconductor structure having low dielectric constant layer

Inventor: Yu-Kai Lu (Chiayi, TW)
Assignee: NANYA TECHNOLOGY CORPORATION
H01L21/31144H01L21/32139H01L21/3065H01L21/308H01L21/31056H01L21/32H01L21/76841H01L21/76883H01L21/76898H01L23/481H01L23/5226H01L2225/06548
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Quick Facts
Patent No.
US 12,205,825
App. No.
17/706,792
Granted
Jan 21, 2025
Kind
B2
Abstract

The present application provides a method of preparing a semiconductor structure. The method includes providing a conductive film; disposing a barrier layer over the conductive film; disposing a first dielectric layer over the barrier layer; disposing a patterned hard mask over the first dielectric layer; and removing a portion of the first dielectric layer exposed through the patterned hard mask, wherein the removal of the portion of the first dielectric layer includes providing a nitrogen plasma to collide with the portion of the first dielectric layer.

Claims (20)

1. A method of preparing a semiconductor structure, comprising: providing a conductive film; disposing a barrier layer over the conductive film; disposing a first dielectric layer over the barrier layer; disposing a patterned hard mask over the first dielectric layer; and removing a portion of the first dielectric layer and a portion of the patterned hard mask to form an opening through the patterned hard mask and the first dielectric layer, wherein the opening has a bottom wall defined at a top surface of the barrier layer, wherein a width of the opening is consistent along the patterned hard mask and the first dielectric layer, wherein the patterned hard mask includes a first mask layer disposed over the first dielectric layer, and a second mask layer disposed over the first mask layer, wherein the opening is formed through the first mask layer and the second mask layer by firstly removing a portion of the second mask layer and then removing a portion of the first mask layer, wherein the width of the opening through the first mask layer is equal to the width of the opening through the second mask layer, and wherein the removal of the portion of the first dielectric layer includes providing a nitrogen plasma to collide with the portion of the first dielectric layer.

2. The method according to claim 1 , wherein the portion of the first dielectric layer is removed to at least partially expose the top surface of the barrier layer.

3. The method according to claim 1 , wherein the portion of the first dielectric layer has a height of about 5 nm, which is a height of the first dielectric layer.

4. The method according to claim 1 , wherein the first dielectric layer includes a low-k dielectric material or an ultra-low-k dielectric material.

5. The method according to claim 1 , wherein the first dielectric layer includes black diamond.

6. The method according to claim 1 , wherein a dielectric constant of the first dielectric layer before the removal is substantially same as a dielectric constant of the first dielectric layer after the removal.

7. The method according to claim 1 , wherein an electrical resistance of the first dielectric layer before the removal is substantially same as an electrical resistance of the first dielectric layer after the removal.

8. The method according to claim 1 , wherein a chemical reaction between the first dielectric layer and the nitrogen plasma is absent during the removal.

9. The method according to claim 1 , further comprising a second dielectric layer disposed between the first dielectric layer and the patterned hard mask, wherein the opening is formed through the second dielectric layer, such that the width of the opening through the first dielectric layer is equal to the width of the opening through the second dielectric layer.

10. The method according to claim 9 , wherein the second dielectric layer includes oxide, wherein a height of the first dielectric layer is greater than a height of the second dielectric layer.

11. The method according to claim 1 , wherein the conductive film includes metal.

12. The method according to claim 1 , wherein the conductive film includes copper.

13. The method according to claim 1 , wherein the barrier layer includes carbon or nitride.

14. The method according to claim 1 , wherein the barrier layer includes silicon carbide.

15. The method according to claim 1 , wherein the first mask layer includes carbon.

16. The method according to claim 1 , wherein the second mask layer includes photoresist.

17. The method according to claim 1 , further comprising: providing a semiconductor substrate, wherein the conductive film is disposed on the semiconductor substrate; deepening the opening from the top surface of the barrier layer to a top surface of the semiconductor substrate through the barrier layer and the conductive film, wherein the opening has a consistent width from the patterned hard mask to the conductive film; and disposing an isolation member on the top surface of the semiconductor substrate through the opening.

18. The method according to claim 17 , wherein the opening is deepened by:

removing a portion of the barrier layer to at least partially expose a top surface of the conductive film; and

removing a portion of the conductive film to at least partially expose a top surface of the conductive film.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2022
From: LU, YU-KAI
To: NANYA TECHNOLOGY CORPORATION
Reel/Frame 059422/0049 →
Continuity (1)
Related Publication 20230317467A1 · Oct 5, 2023
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