IP Library Granted Patent US 12,205,983
Granted Patent B2
US 12,205,983 · App. 17/546,248 · Granted Jan 21, 2025

Semiconductor device and manufacturing method of semiconductor device

Inventors: Hidefumi Takaya (Toyota, JP); Yuichi Takeuchi (Kariya, JP); Yukihiko Watanabe (Nagakute, JP)
Assignee: DENSO CORPORATION
H01L29/0619H01L29/4236H01L29/66053H01L29/7811H01L29/7813
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Quick Facts
Patent No.
US 12,205,983
App. No.
17/546,248
Granted
Jan 21, 2025
Kind
B2
Abstract

A semiconductor device includes a semiconductor substrate having an element region and a terminal region located around the element region. The terminal region includes multiple guard rings and multiple first diffusion regions. When the semiconductor substrate is viewed in a plan view, one of the first diffusion regions is arranged correspondingly to one of the guard rings, and each of the guard rings is located in corresponding one of the first diffusion regions. A width of each of the first diffusion regions is larger than a width of corresponding one of the guard rings.

Claims (30)

1. A semiconductor device comprising:

a semiconductor substrate having a first main surface and a second main surface opposite from each other;

a first electrode disposed on the first main surface of the semiconductor substrate; and

a second electrode disposed on the second main surface of the semiconductor substrate, wherein

the semiconductor substrate includes:

an element region in which a switching element structure is formed, and

a terminal region located around the element region,

the terminal region includes:

a plurality of guard rings of p-type disposed at a plurality of positions exposed on the first main surface of the semiconductor substrate, each of the plurality of guard rings making a circuit around the element region, and

a plurality of first diffusion regions of p-type disposed at a first depth from the first main surface of the semiconductor substrate, each of the plurality of first diffusion regions being separated from the plurality of guard rings in a thickness direction of the semiconductor substrate, and making a circuit around the element region,

one of the plurality of first diffusion regions is arranged correspondingly to one of the plurality of guard rings when the semiconductor substrate is viewed in a plan view,

each of the plurality of guard rings is located in corresponding one of the plurality of first diffusion regions when the semiconductor substrate is viewed in the plan view, and

a width of each of the plurality of first diffusion regions is larger than a width of corresponding one of the plurality of guard rings, wherein

the switching element structure includes a trench-type insulated gate disposed on the first main surface of the semiconductor substrate,

the first depth is deeper than a bottom surface of the trench-type insulated gate, and

a lower end of each of the plurality of guard rings is located above the bottom surface of the trench-type insulated gate.

2. The semiconductor device according to claim 1 , wherein

a p-type impurity concentration in the plurality of first diffusion regions is lower than a p-type impurity concentration in the plurality of guard rings.

3. The semiconductor device according to claim 1 , wherein

the terminal region further includes a plurality of second diffusion regions of p-type disposed at a second depth deeper than the first depth from the first main surface of the semiconductor substrate,

each of the plurality of second diffusion regions is separated from the plurality of first diffusion regions in the thickness direction of the semiconductor substrate, and makes a circuit around the element region,

one of the plurality of second diffusion regions is arranged correspondingly to one of the plurality of guard rings when the semiconductor substrate is viewed in the plan view,

each of the plurality of guard rings is located in corresponding one of the plurality of second diffusion regions when the semiconductor substrate is viewed in the plan view, and

a width of each of the plurality second diffusion regions is larger than the width of corresponding one of the plurality of guard rings.

4. The semiconductor device according to claim 3 , wherein

a p-type impurity concentration in the plurality of second diffusion regions is lower than a p-type impurity concentration in the plurality of guard rings.

5. The semiconductor device according to claim 1 , wherein

the semiconductor substrate is a SiC substrate.

6. The semiconductor device according to claim 1 , wherein

a thickness of each of the plurality of first diffusion regions in the thickness direction of the semiconductor substrate is larger than a thickness of the corresponding one of the plurality of guard rings in the thickness direction of the semiconductor substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2021
From: TAKAYA, HIDEFUMI; TAKEUCHI, YUICHI; WATANABE, YUKIHIKO
To: DENSO CORPORATION
Reel/Frame 058344/0540 →
Priority Claims (1)
JP 2019-126893 · Jul 8, 2019 · national
Continuity (2)
Continuation PCTJP2020013175 · Mar 24, 2020
Related Publication 20220102485A1 · Mar 31, 2022
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