IP Library › Granted Patent US 12,210,780
Granted Patent B2
US 12,210,780 · App. 17/954,748 · Granted Jan 28, 2025

Filtered responses of memory operation messages

Inventors: Johnathan Robert Alsop (Seattle, WA); Shaizeen Dilawarhusen Aga (Santa Clara, CA); Mohamed Assem Abd Elmohsen Ibrahim (Santa Clara, CA)
Assignee: Advanced Micro Devices, Inc.
G06F3/0673G06F3/0611G06F3/0653G06F3/0659
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,210,780
App. No.
17/954,748
Granted
Jan 28, 2025
Kind
B2
Abstract

In accordance with described techniques for filtered responses to memory operation messages, a computing system or computing device includes a memory system that receives messages. A filter component in the memory system receives the responses to the memory operation messages, and filters one or more of the responses based on a filterable condition. A tracking logic component tracks the one or more responses as filtered responses for communication completion.

Claims (44)

1. A memory system configured to:

generate a filtered response by filtering a response to a read request submitted by a processor, the filtering being based on the response having at least one element of data that will not be utilized by the processor; and

track the filtered response for communication completion.

2. The memory system of claim 1 , wherein the response fails a filterable condition or have includes a value that does not satisfy the filterable condition.

3. The memory system of claim 1 , wherein the response is filtered based on at least one of specified information in the response, or configuration information programmed in the memory system.

4. The memory system of claim 1 , further configured to:

receive an additional response to an additional read request that satisfies a filterable condition; and

communicate the additional response as a non-filtered response back through a communication path in the memory system.

5. The memory system of claim 1 , further configured to report the filtered response as a negative acknowledgement rather than as a data response.

6. The memory system of claim 1 , further configured to:

generate filtered responses by filtering responses to read requests;

count a quantity of the filtered responses; and

report the quantity of the filtered responses.

7. The memory system of claim 1 , further configured to initiate a flush operation causing the memory system to cease filtering and send one or more pending filtered responses to respective destinations.

8. The memory system of claim 1 , wherein the filtering includes condensing one or more non-filterable elements of the data into the filtered response that excludes the at least one element.

9. The memory system of claim 1 , wherein the at least one element of data that will not be utilized by the processor is read responsive to the read request.

10. A computing device, comprising:

a memory system to:

receive a read request;

generate a response to the read request; and

generate a filtered response by filtering the response based on at least one of specified information in the response, or configuration information programmed in the memory system.

11. The computing device of claim 10 , wherein the memory system is further configured to track the filtered response for communication completion.

12. The computing device of claim 11 , wherein the memory system is configured to report the filtered response as a negative acknowledgement rather than as a data response.

13. The computing device of claim 11 , wherein the memory system is further configured to:

generate filtered responses by filtering responses to read requests;

count a quantity of the filtered responses; and

report the quantity of the filtered responses.

14. The computing device of claim 10 , wherein the response includes multiple elements, one or more of the multiple elements of the response satisfy a filterable condition, and at least one of the multiple elements does not satisfy the filterable condition, wherein the memory system is configured to:

filter the response if all of the multiple elements do not satisfy the filterable condition;

filter the response if requested elements of the multiple elements do not satisfy the filterable condition; or

split the multiple elements based on individual filterability and condense non-filterable elements of the multiple elements into a response message.

15. A method, comprising:

generating a filtered response by filtering a response to a read request based on a filterable condition; and

reporting the filtered response as a negative acknowledgement rather than as a data response.

16. The method of claim 15 , wherein the response is identified as being a filterable response based on at least one of specified information in the response, or configuration information programmed in a memory system configured to filter the response.

17. The method of claim 15 , wherein the response includes an element of data from memory that will not be utilized by a processor responsive to the read request.

18. The method of claim 15 , further comprising:

generating filtered responses by filtering responses to read requests; and

reporting a group of the filtered responses as at least one of negative acknowledgements grouped together, or as the negative acknowledgements appended to additional response messages.

19. The method of claim 15 , further comprising:

generating filtered responses by filtering responses to read requests;

counting a quantity of the filtered responses; and

reporting the quantity of the filtered responses.

20. The method of claim 15 , wherein the filterable condition includes one or more of an equal to condition, a not equal to condition, a greater than condition, a less than condition, and a non-zero condition.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2022
From: ALSOP, JOHNATHAN ROBERT; AGA, SHAIZEEN DILAWARHUSEN; IBRAHIM, MOHAMED ASSEM ABD ELMOHSEN
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 061614/0849 →
Continuity (1)
Related Publication 20240106782A1 · Mar 28, 2024
References Cited (13)
US 7809868B1 · Mu · 2010 [cited by examiner]
US 7908656B1 · Mu · 2011 [cited by examiner]
US 8335860B2 · Moran · 2012 [cited by examiner]
US 10649831B2 · Tokoyoda · 2020 [cited by examiner]
US 20150149490A1 · Kim · 2015 [cited by examiner]
US 20160196356A1 · Kim · 2016 [cited by examiner]
US 20180129737A1 · Louie · 2018 [cited by examiner]
US 20200342294A1 · Jang · 2020 [cited by examiner]
US 20240103730A1 · Alsop et al. · 2024 [cited by applicant]
US 20240103876A1 · Agarwal · 2024 [cited by examiner]
Graham, Richard L, et al., “Scalable hierarchical aggregation protocol (SHArP): a hardware architecture for efficient data reduction”, COM-HPC '16: Proceedings of the First Workshop on Optimization of Communication in H… [cited by applicant]
Klenk, Benjamin , et al., “An in-network architecture for accelerating shared-memory multiprocessor collectives”, Proceedings of the ACM/IEEE 47th Annual International Symposium on Computer Architecture [retrieved Aug. … [cited by applicant]
Sapio, Amedeo , et al., “In-Network Computation is a Dumb Idea Whose Time Has Come”, Proceedings of the 16th ACM Workshop on Hot Topics in Networks [retrieved May 19, 2022]. Retrieved from the Internet <https://sands.ka… [cited by applicant]
Cited By (1)
US 12,638,974