IP Library › Granted Patent US 12,638,974
Granted Patent B2
US 12,638,974 · App. 17/954,671 · Granted May 26, 2026

Reduction of parallel memory operation messages

Inventors: Johnathan Robert Alsop (Seattle, WA); Shaizeen Dilawarhusen Aga (Sunnyvale, CA); Mohamed Assem Abd Elmohsen Ibrahim (Santa Clara, CA)
Assignee: Advanced Micro Devices, Inc.
G06F3/0613G06F3/0659G06F3/0673
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Quick Facts
Patent No.
US 12,638,974
App. No.
17/954,671
Granted
May 26, 2026
Kind
B2
Abstract

In accordance with described techniques for reduction of parallel memory operation messages, a computing system or computing device includes a memory system that receives memory operation messages. A shared response component in the memory system receives responses to the memory operation messages, and identifies a set of the responses that are coalesceable. The shared response component then coalesces the set of the responses into a combined message for communication completion through a communication path in the memory system.

Claims (39)

1 . A memory system, configured to:

receive memory operation messages;

coalesce a set of the memory operation messages into a coalesced message; and

coalesce the coalesced message with at least one additional memory operation message to form a further coalesced message.

2 . The memory system of claim 1 , wherein the memory operation messages are identified based on at least one of:

software-specified criteria;

a property of an address of one or more accumulation values in the memory system;

a requestor identifier of a requestor that issues the memory operation messages;

a local state of a coalescing unit; or

a data field added to one or more of the memory operation messages.

3 . The memory system of claim 1 , further configured to initiate a coalescing flush operation instructing the memory system to cease coalescing and send pending coalesceable memory operation messages to their destination.

4 . A computing device, comprising:

a memory system to:

receive memory operation messages;

coalesce a set of the memory operation messages into a combined message;

track the combined message for communication completion through a communication path in the memory system; and

initiate a coalescing flush operation that causes the memory system to send one or more pending coalescable memory operation messages to one or more respective destinations.

5 . The computing device of claim 4 , the memory system further configured to receive the memory operation messages from a requestor, and report the communication completion to the requestor in response to each pending request of the combined message having received a corresponding response via the communication path.

6 . The computing device of claim 4 , the memory system further configured to track the combined message for the communication completion using a counter that tracks pending memory operation messages of the set.

7 . The computing device of claim 4 , the memory system further configured to coalesce the set of the memory operation messages into the combined message using a coalescing table that stores coalescable responses of the memory operation messages.

8 . The computing device of claim 7 , the memory system further configured to insert a coalesceable response in the coalescing table based on the coalescing table missing an existing coalesceable response that is coalesceable with the coalesceable response.

9 . The computing device of claim 7 , the memory system further configured to generate a coalesced response by coalescing a coalesceable response with an existing coalescable response in the coalescing table that is coalesceable with the coalesceable response.

10 . The computing device of claim 9 , the memory system further configured to maintain the coalesced response in the coalescing table after coalescing.

11 . The computing device of claim 7 , the memory system wherein the coalescable responses are responses of the memory operation messages that are identified as coalescable with other responses of the memory operation messages.

12 . The computing device of claim 4 , wherein the memory operation messages are communicated individually as requests through the communication path.

13 . The computing device of claim 4 , wherein the memory operation messages in the set of the memory operation messages are coalesced in the combined message as a response back through the communication path.

14 . The computing device of claim 4 , the memory system further configured to report the communication completion as at least one response that is separate from the combined message.

15 . The computing device of claim 4 , the memory system further configured to report the communication completion as a single response for the set of the memory operation messages.

16 . The computing device of claim 4 , the memory system further configured to indicate an accumulation operation identifier for the set of the memory operation messages in the combined message.

17 . A method, comprising:

receiving memory operation messages;

coalescing the memory operation messages into a coalesced message;

coalescing the coalesced message with at least one additional memory operation message to form a further coalesced message; and

tracking the further coalesced message for communication completion through a communication path in a memory system.

18 . The method of claim 17 , wherein coalescing the memory operation messages comprises coalescing responses to the memory operation messages into the coalesced message for communication response through the memory system.

19 . The method of claim 17 , further comprising one of:

reporting the communication completion as individual accumulation values for each of the memory operation messages; or

reporting the communication completion as a reduction response for the coalesced message of the memory operation messages.

20 . The method of claim 17 , further comprising initiating a coalescing flush operation instructing the memory system to cease coalescing and send pending coalesceable memory operation messages to their destination.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2022
From: ALSOP, JOHNATHAN ROBERT; AGA, SHAIZEEN DILAWARHUSEN; IBRAHIM, MOHAMED ASSEM ABD ELMOHSEN
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 061614/0543 →
Continuity (1)
Related Publication 20240103730A1 · Mar 28, 2024
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