Efficient convolution in machine learning environments
A mechanism is described for facilitating smart convolution in machine learning environments. An apparatus of embodiments, as described herein, includes one or more processors including one or more graphics processors, and detection and selection logic to detect and select input images having a plurality of geometric shapes associated with an object for which a neural network is to be trained. The apparatus further includes filter generation and storage logic (“filter logic”) to generate weights providing filters based on the plurality of geometric shapes, where the filter logic is further to sort the filters in filter groups based on common geometric shapes of the plurality of geographic shapes, and where the filter logic is further to store the filter groups in bins based on the common geometric shapes, wherein each bin corresponds to a geometric shape.
1. An apparatus comprising:
processor circuitry coupled to a memory, the processor circuitry to:
initialize geometric shape-based training of a filter group based on one or more values obtained from a bin, wherein the bin is identified based on the filter group and selected based on a geometric shape of the object; and
initiate geometric shape-specific training of a neural network based on the trained filter group.
2. The apparatus of claim 1 , wherein the processor circuitry is further to:
detect and select input images having geometric shapes associated with the object for which the neural network is to be trained, wherein the bin includes the filter group associated with the geometric shape of the object;
generate weights providing filters based on the geometric shapes;
sort the filters in filter groups based on common geometric shapes of the geographic shapes; and
store the filter groups in bins based on the common geometric shapes, wherein one or more bins correspond to one or more geometric shapes.
3. The apparatus of claim 1 , wherein the processor circuitry is further to detect layers of the neural network, wherein the layers include higher layers and lower layers; and detect and identify existing convolution filters associated with the lower-level layers.
4. The apparatus of claim 3 , wherein the processor circuitry is further to:
separate the existing convolution filters of the neural network into pairs of new convolution filters, where a new convolution filter is half in size of an existing convolution filter; and
train the neural network based on the pairs of new convolution filters, wherein the processor circuitry includes graphics processor circuitry co-located with application processor circuitry on a common semiconductor package.
5. A method comprising:
initializing, by one or more processors of a computing device, geometric shape-based training of a filter group based on one or more values obtained from a bin, wherein the bin is identified based on the filter group and selected based on a geometric shape of the object; and
initiating geometric shape-specific training of a neural network based on the trained filter group.
6. The method of claim 5 , further comprising:
detecting and selecting input images having geometric shapes associated with the object for which the neural network is to be trained, wherein the bin includes the filter group associated with the geometric shape of the object;
generating weights providing filters based on the geometric shapes;
sorting the filters in filter groups based on common geometric shapes of the geographic shapes; and
storing the filter groups in bins based on the common geometric shapes, wherein one or more bins correspond to one or more geometric shapes.
7. The method of claim 5 , further comprising detecting layers of the neural network, wherein the layers include higher layers and lower layers; and detect and identify existing convolution filters associated with the lower-level layers.
8. The method of claim 7 , further comprising:
separating the existing convolution filters of the neural network into pairs of new convolution filters, where a new convolution filter is half in size of an existing convolution filter; and
training the neural network based on the pairs of new convolution filters, wherein the one or more processors include one or more graphics processors co-located with one or more application processors on a common semiconductor package.
9. At least one non-transitory computer-readable medium having stored thereon instructions which, when executed, cause a computing device to facilitate operations comprising:
initializing geometric shape-based training of a filter group based on one or more values obtained from a bin, wherein the bin is identified based on the filter group and selected based on a geometric shape of the object; and
initiating geometric shape-specific training of a neural network based on the trained filter group.
10. The non-transitory computer-readable medium of claim 9 , wherein the operations further comprise:
detecting and selecting input images having geometric shapes associated with the object for which the neural network is to be trained, wherein the bin includes the filter group associated with the geometric shape of the object;
generating weights providing filters based on the geometric shapes;
sorting the filters in filter groups based on common geometric shapes of the geographic shapes; and
storing the filter groups in bins based on the common geometric shapes, wherein one or more bins correspond to one or more geometric shapes.
11. The non-transitory computer-readable medium of claim 9 , wherein the operations further comprise detecting layers of the neural network, wherein the layers include higher layers and lower layers; and detect and identify existing convolution filters associated with the lower-level layers.
12. The non-transitory computer-readable medium of claim 11 , wherein the operations further comprise:
separating the existing convolution filters of the neural network into pairs of new convolution filters, where a new convolution filter is half in size of an existing convolution filter; and
training the neural network based on the pairs of new convolution filters, wherein the computing device comprises one or more processors including one or more graphics processors co-located with one or more application processors on a common semiconductor package.