IP Library › Granted Patent US 12,229,437
Granted Patent B2
US 12,229,437 · App. 17/832,309 · Granted Feb 18, 2025

Dynamic buffer for storage system

Inventors: Ying Gao (San Jose, CA); Boris Feigin (San Francisco, CA); Hari Kannan (Sunnyvale, CA)
Assignee: PURE STORAGE, INC.
G06F3/0656G06F3/0604G06F3/0679
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Quick Facts
Patent No.
US 12,229,437
App. No.
17/832,309
Granted
Feb 18, 2025
Kind
B2
Abstract

A storage system has NVRAM (nonvolatile random-access memory), storage memory that includes SLC (single level cell) flash memory and QLC (quad level cell) flash memory, and a processor. The processor performs a method that includes determining that a size of a buffer of a storage system should be adjusted. The storage system comprises a non-volatile random-access memory (NVRAM), single level cell (SLC) flash memory, and quad level cell (QLC) flash memory. The buffer of the storage system comprises one or more of the NVRAM and a portion of the SLC flash memory. The method also includes adjusting the size of the buffer of the storage system to a first size.

Claims (54)

1. A method, comprising:

determining that a size of a buffer of a storage system should be adjusted, wherein:

the storage system comprises a non-volatile random-access memory (NVRAM), single level cell (SLC) flash memory, and quad level cell (QLC) flash memory;

the buffer of the storage system comprises a portion of the NVRAM and a portion of the SLC flash memory; and

adjusting the size of the buffer of the storage system to a first size.

2. The method of claim 1 , wherein determining that the size of the buffer of the storage system should be adjusted comprises:

determining that an amount of write activity in the storage system has increased above a first activity threshold; or

determining that the amount of write activity in the storage system has decreased below a second activity threshold.

3. The method of claim 1 , wherein determining that the size of the buffer of the storage system should be adjusted comprises:

determining that an amount of NVRAM utilization has increased above a first utilization threshold; or

determining that the amount of NVRAM utilization has decreased below a second utilization threshold.

4. The method of claim 1 , wherein adjusting the size of the buffer of the storage system to the first size comprises:

increasing the portion of the SLC flash memory used for the buffer.

5. The method of claim 4 , wherein increasing the portion of the SLC flash memory used for the buffer comprises:

operating a portion of the QLC flash memory in an SLC mode.

6. The method of claim 5 , wherein the portion of the QLC flash memory that is operated in SLC mode is selected based on amounts of wear in cells of the QLC flash memory.

7. The method of claim 1 , wherein adjusting the size of the buffer of the storage system to the first size comprises:

decreasing the portion of the SLC flash memory used for the buffer.

8. The method of claim 7 , wherein decreasing the portion of the SLC flash memory used for the buffer comprises:

operating a portion of the QLC flash memory in a QLC mode.

9. The method of claim 1 , wherein the portion of the SLC flash memory used for the buffer comprises a roving region for the SLC flash memory.

10. The method of claim 1 , wherein adjusting the size of the buffer of the storage system to the first size comprises:

decreasing the portion of the NVRAM used for the buffer.

11. A non-transitory, computer-readable media having instructions thereupon which, when executed by a processor, cause the processor to perform a method comprising:

determining that a size of a buffer of a storage system should be adjusted, wherein:

the storage system comprises a non-volatile random-access memory (NVRAM), single level cell (SLC) flash memory, and quad level cell (QLC) flash memory;

the buffer of the storage system comprises one or more a portion of the NVRAM and a portion of the SLC flash memory;

adjusting the size of the buffer of the storage system to a first size.

12. The non-transitory, computer-readable media of claim 11 , wherein determining that the size of the buffer of the storage system should be adjusted comprises:

determining that an amount of write activity in the storage system has increased above a first activity threshold; or

determining that the amount of write activity in the storage system has decreased below a second activity threshold.

13. The non-transitory, computer-readable media of claim 11 , wherein determining that the size of the buffer of the storage system should be adjusted comprises:

determining that an amount of NVRAM utilization has increased above a first utilization threshold; or

determining that the amount of NVRAM utilization has decreased below a second utilization threshold.

14. The non-transitory, computer-readable media of claim 11 , wherein adjusting the size of the buffer of the storage system to the first size comprises:

increasing the portion of the SLC flash memory used for the buffer.

15. The non-transitory, computer-readable media of claim 11 , wherein adjusting the size of the buffer of the storage system to the first size comprises:

decreasing the portion of the SLC flash memory used for the buffer.

16. A storage system, comprising:

storage memory, comprising SLC (single level cell) flash memory and QLC (quad level cell) flash memory;

NVRAM (nonvolatile random-access memory); and

a processor, to perform a method, comprising:

determining that a size of a buffer of the storage system should be adjusted, wherein the buffer of the storage system comprises one or more a portion of the NVRAM and a portion of the SLC flash memory;

adjusting the size of the buffer of the storage system to a first size.

17. The storage system of claim 16 , wherein determining that the size of the buffer of the storage system should be adjusted comprises:

determining that an amount of write activity in the storage system has increased above a first activity threshold; or

determining that the amount of write activity in the storage system has decreased below a second activity threshold.

18. The storage system of claim 16 , wherein determining that the size of the buffer of the storage system should be adjusted comprises:

determining that an amount of NVRAM utilization has increased above a first utilization threshold; or

determining that the amount of NVRAM utilization has decreased below a second utilization threshold.

19. The storage system of claim 16 , wherein adjusting the size of the buffer of the storage system to the first size comprises:

increasing the portion of the SLC flash memory used for the buffer.

20. The storage system of claim 16 , wherein adjusting the size of the buffer of the storage system to the first size comprises:

decreasing the portion of the SLC flash memory used for the buffer.

Continuity (4)
Continuation In Part 17570340 · Jan 6, 2022
Continuation In Part 17512377 · Oct 27, 2021
Continuation In Part 17139460 · Dec 31, 2020
Related Publication 20220300198A1 · Sep 22, 2022
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