IP Library › Granted Patent US 12,243,886
Granted Patent B2
US 12,243,886 · App. 18/097,786 · Granted Mar 4, 2025

Semiconductor package

Inventor: Kyongsoon Cho (Incheon, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H01L27/14618H01L27/14621H01L27/14627H01L27/14634H01L27/14636H01L27/14645H01L27/14683
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Quick Facts
Patent No.
US 12,243,886
App. No.
18/097,786
Granted
Mar 4, 2025
Kind
B2
Abstract

A semiconductor package is provided. The package includes a semiconductor chip that includes photoelectric conversion elements provided on an active array region of the semiconductor chip; a transparent member on the semiconductor chip; and a spacer between the semiconductor chip and the transparent member, and horizontally spaced apart from the active array region. The spacer includes: a supporter that extends from a top surface of the semiconductor chip toward a bottom surface of the transparent member; a first adhesive pattern that is between the semiconductor chip and a bottom surface of the supporter; and a second adhesive pattern that is between the transparent member a top surface of the supporter. The spacer protrudes from a lateral surface of the semiconductor chip, and a lateral surface of the spacer is offset from the lateral surface of the semiconductor chip.

Claims (59)

1. A method of manufacturing a semiconductor package, comprising:

providing a support substrate including a cavity that vertically penetrates the support substrate, wherein the support substrate comprises a first surface and a second surface that both extend from a first lateral surface of the support substrate to a second lateral surface of the support substrate;

providing an image sensor part, the image sensor part including a first semiconductor chip and a second semiconductor chip;

attaching the image sensor part to the first surface of the support substrate using a first adhesive layer on the first surface of the support substrate so as to cause an active array region of the second semiconductor chip to rest inside the cavity when viewed in plan, the support substrate being attached to an outer edge of the second semiconductor chip;

attaching a transparent substrate to the second surface of the support substrate which is opposite the first surface; and

cutting the support substrate and the first adhesive layer,

wherein the first adhesive layer extends along the first surface of the support substrate from the first lateral surface of the support substrate to the second lateral surface of the support substrate.

2. The method as claimed in claim 1 , wherein the cutting comprises a singulation process performed along a sawing line that crosses the support substrate and the transparent substrate, and

wherein the sawing line is positioned beside and spaced apart from the image sensor part.

3. The method as claimed in claim 2 , wherein, after the cutting, the first lateral surface of the support substrate is aligned with a lateral surface of the transparent substrate.

4. The method as claimed in claim 1 , wherein the providing the support substrate comprises:

providing a second adhesive layer on the second surface of the support substrate; and

etching the support substrate to form the cavity.

5. The method as claimed in claim 4 , wherein the cavity vertically penetrates the first adhesive layer, the support substrate and the second adhesive layer.

6. The method as claimed in claim 4 , wherein the first adhesive layer is used to attach the second semiconductor chip to the first surface of the support substrate, and

wherein the second adhesive layer is used to attach the transparent substrate to the second surface of the support substrate.

7. The method as claimed in claim 1 , wherein a modulus of the support substrate is greater than a modulus of the first semiconductor chip and a modulus of the second semiconductor chip.

8. The method as claimed in claim 1 , wherein a thermal expansion coefficient of the support substrate is less than a thermal expansion coefficient of the first semiconductor chip and a thermal expansion coefficient of the second semiconductor chip.

9. The method as claimed in claim 1 , wherein the providing the support substrate comprises etching the support substrate to form the cavity and a trench, the trench surrounds and spaced apart from the cavity when viewed in plan,

wherein the cutting the support substrate comprises a singulation process performed along a sawing line that crosses the transparent substrate, and

wherein the sawing line is positioned beside and spaced apart from the image sensor part and the support substrate.

10. The method as claimed in claim 9 , wherein the support substrate includes a non-conductive adhesive material.

11. The method as claimed in claim 9 , further comprising forming an adhesive member on the transparent substrate,

wherein the adhesive member is formed by filling an adhesive material into the trench that is a space defined by the transparent substrate and an inner wall of the trench.

12. The method as claimed in claim 11 , wherein the filling the adhesive material continues until a top surface of the adhesive member reaches a lateral surface of the second semiconductor chip.

13. The method as claimed in claim 1 , wherein the second semiconductor chip comprises:

a semiconductor layer that comprises a plurality of photoelectric conversion elements;

a plurality of color filters on a top surface of the semiconductor layer and arranged to correspond to the plurality of photoelectric conversion elements;

a plurality of micro-lenses on the plurality of color filters;

a through electrode that vertically penetrates the semiconductor layer and is electrically connected to at least one of the plurality of photoelectric conversion elements; and

a lower pad on a bottom surface of the semiconductor layer and electrically connected to the through electrode, and

wherein the first semiconductor chip is electrically connected, via the through electrode, to at least one of the plurality of photoelectric conversion elements.

14. A method of manufacturing a semiconductor package, comprising:

providing a support substrate including a cavity that vertically penetrates the support substrate, wherein the support substrate comprises a first surface and a second surface that both extend from a first lateral surface of the support substrate to a second lateral surface of the support substrate;

providing an image sensor part, the image sensor part including a first semiconductor chip and a second semiconductor chip;

attaching the image sensor part to the first surface of the support substrate using a first adhesive layer on the first surface of the support substrate so as to cause an active array region of the second semiconductor chip to rest inside the cavity when viewed in plan, the support substrate being attached to an outer edge of the second semiconductor chip;

attaching a transparent substrate to the second surface of the support substrate which is opposite the first surface; and

cutting at least one of the support substrate and the transparent substrate,

wherein the first adhesive layer extends along the first surface of the support substrate from the first lateral surface of the support substrate to the second lateral surface of the support substrate,

wherein the cutting comprises a singulation process performed along a sawing line that cross the support substrate, and

wherein the sawing line is positioned beside and spaced apart from the image sensor part and the transparent substrate.

15. The method as claimed in claim 14 , wherein, after the cutting, the support substrate protrudes outwardly from a lateral surface of the transparent substrate, and

wherein the first lateral surface of the support substrate and the second lateral surface of the support substrate are offset from the lateral surface of the transparent substrate.

16. A method of manufacturing a semiconductor package, comprising:

providing a support substrate;

providing a first adhesive layer on a first surface of the support substrate;

providing a second adhesive layer on a second surface of the support substrate which is opposite the first surface;

etching the support substrate to form a cavity

attaching an image sensor part to the first surface of the support substrate, the image sensor part including a first semiconductor chip and a second semiconductor chip;

attaching a transparent substrate to the second surface of the support substrate; and

cutting at least one of the support substrate and the transparent substrate,

wherein a modulus of the support substrate is greater than a modulus of the first semiconductor chip and a modulus of the second semiconductor chip.

17. The method as claimed in claim 16 , wherein the image sensor part is attached to the first surface of the support substrate so as to cause an active array region of the second semiconductor chip to rest inside the cavity when viewed in plan, and

wherein the support substrate is attached to an outer edge of the second semiconductor chip.

18. The method as claimed in claim 16 , wherein the cutting comprises a singulation process performed along a sawing line that crosses the support substrate and the transparent substrate, and

wherein the sawing line is positioned beside and spaced apart from the image sensor part.

19. The method as claimed in claim 16 , wherein the cutting comprises a singulation process performed along a sawing line that crosses the support substrate, and

wherein the sawing line is positioned beside and spaced apart from the image sensor part and the transparent substrate.

20. The method as claimed in claim 16 , wherein a thermal expansion coefficient of the support substrate is less than a thermal expansion coefficient of the first semiconductor chip and a thermal expansion coefficient of the second semiconductor chip.

Priority Claims (1)
KR 10-2019-0172320 · Dec 20, 2019 · national
Continuity (2)
Continuation 16996058 · Aug 18, 2020
Related Publication 20230154954A1 · May 18, 2023
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