Method of forming memory transistor with sacrificial polysilicon layer
According to the present embodiment, a semiconductor device includes a semiconductor substrate, a memory transistor, and a MOS transistor. The memory transistor includes at least a first silicon dioxide film and a first gate electrode positioned on the semiconductor substrate in order. The MOS transistor includes a second silicon dioxide film and a second gate electrode positioned on the semiconductor substrate in order. Any bird's beak is not generated in at least either the first silicon dioxide film or the first gate electrode of the memory transistor.
1. A manufacturing method of a semiconductor device comprising a memory transistor having at least a first silicon dioxide film and a first gate electrode positioned on a semiconductor substrate in order, and a MOS transistor having a second silicon dioxide film and a second gate electrode positioned on the semiconductor substrate in order, the method comprising:
a first process of forming at least a first silicon dioxide film and a first gate electrode in a first region of a semiconductor substrate;
a second process of forming a sacrificial polysilicon film in at least a part of a surface region covering the first silicon dioxide film and the first gate electrode;
and a third process of forming a gate dielectric film of a second silicon dioxide film in a second region different from the first region of the semiconductor substrate by performing a thermal oxidization of the second region of the semiconductor substrate along with a region of the sacrificial polysilicon film,
wherein a thickness of the sacrificial polysilicon film before the thermal oxidization is not more than 45 percent of a thickness of the second silicon dioxide film formed by the thermal oxidization.
2. The method of claim 1 , wherein the thickness of the sacrificial polysilicon film before the thermal oxidization is not less than 35 percent of the thickness of the second silicon dioxide film formed by the thermal oxidization.
3. The method of claim 1 , wherein the first process comprises generating the first silicon dioxide film, a first silicon nitride film, a third silicon dioxide film, and the first gate electrode.
4. The method of claim 1 , wherein the first process comprises generating the first silicon dioxide film, a floating gate electrode, a fourth silicon dioxide film, and the first gate electrode.
5. The method of claim 1 , wherein the second process comprises
forming the sacrificial polysilicon film on the semiconductor substrate, and
removing a predetermined thickness of the sacrificial polysilicon film from an upper side on the semiconductor substrate.
6. The method of claim 1 , wherein the second process comprises
forming the sacrificial polysilicon film on the semiconductor substrate, and
removing the sacrificial polysilicon film on the second region.
7. The method of claim 5 , wherein a predetermined thickness of the sacrificial polysilicon film is removed from an upper side on the semiconductor substrate to cause the sacrificial polysilicon film in contact with the first silicon dioxide film and side surfaces of the first gate electrode to remain.