IP Library › Granted Patent US 12,274,093
Granted Patent B2
US 12,274,093 · App. 17/672,249 · Granted Apr 8, 2025

Wiring substrate and display device including the same

Inventors: Joon Yong Park (Gunpo-si, KR); Gyung Min Baek (Yongin-si, KR); Shin Il Choi (Hwaseong-si, KR); Do Keun Song (Yongin-si, KR); Young Rok Kim (Anyang-si, KR); Jong Hyun Choung (Suwon-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H10D86/60H01L25/167H10D86/021H10D86/441H01L24/24H01L24/25H01L2224/24147H01L2224/25175H01L2924/12041
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Quick Facts
Patent No.
US 12,274,093
App. No.
17/672,249
Granted
Apr 8, 2025
Kind
B2
Abstract

A display device includes conductive layers including wires and conductive patterns in a display area and a pad area, a via layer on the conductive layers, a first electrode and a second electrode on the via layer in the display area and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, light emitting elements on the first electrode and the second electrode spaced apart from each other on the first insulating layer, and a first connection electrode on the first electrode and electrically contacting the light emitting elements, and a second connection electrode on the second electrode and electrically contacting the light emitting elements, each of the conductive layers includes a first metal layer and a second metal layer on the first metal layer, and the second metal layer contains copper and has a grain size of about 155 nm or less.

Claims (73)

1. A display device comprising:

a substrate including a display area and a pad area disposed on a side of the display area;

conductive layers including wires and conductive patterns disposed in the display area and the pad area, each of the conductive layers includes a first metal layer and a second metal layer disposed on the first metal layer with the second metal layer containing copper (Cu) and having a grain size of about 155 nm or less and including copper grains of a random grain orientation;

a via layer disposed on the conductive layers;

a first electrode and a second electrode disposed on the via layer in the display area, the first electrode and the second electrode being spaced apart from each other;

a first insulating layer disposed on the first electrode and the second electrode;

light emitting elements disposed on the first electrode and the second electrode, the light emitting elements being spaced apart from each other on the first insulating layer;

a first connection electrode disposed on the first electrode and electrically contacting the light emitting elements; and

a second connection electrode disposed on the second electrode and electrically contacting the light emitting elements.

2. The display device of claim 1 , wherein the second metal layer has a resistivity of about 2.3 μΩcm or less.

3. The display device of claim 1 , wherein the

first metal layer has a thickness of about 500 Å or less, and

the second metal layer has a thickness in a range of about 3000 Å to about 17000 Å.

4. The display device of claim 1 , wherein

the first metal layer includes titanium (Ti), and

the second metal layer includes a copper alloy containing copper (Cu) as a main component and including at least one of silver (Ag), magnesium (Mg), aluminum (Al), indium (In), niobium (Nb), and boron (B) as an impurity metal.

5. The display device of claim 4 , wherein the second metal layer includes the impurity metal at a content of about 5 at % or less.

6. The display device of claim 1 , wherein the first metal layer includes: a titanium alloy containing titanium (Ti) as a main component and containing zinc (Zn) as an impurity metal, or a copper alloy containing copper (Cu) as a main component and containing at least one of silver (Ag), magnesium (Mg), aluminum (AI), indium (In), niobium (Nb), and boron (B) as an impurity metal.

7. The display device of claim 1 , wherein the first metal layer is made of at least one of zinc oxide (ZnO) and indium-zinc oxide (IZO).

8. A display device comprising:

a substrate including a display area and a pad area disposed on a side of the display area:

conductive layers including wires and conductive patterns disposed in the display area and the pad area, each of the conductive layers includes a first metal layer and a second metal layer disposed on the first metal layer with the second metal layer containing copper (Cu) and having a grain size of about 155 nm or less;

a via layer disposed on the conductive layers:

a first electrode and a second electrode disposed on the via layer in the display area, the first electrode and the second electrode being spaced apart from each other;

a first insulating layer disposed on the first electrode and the second electrode;

light emitting elements disposed on the first electrode and the second electrode, the light emitting elements being spaced apart from each other on the first insulating layer:

a first connection electrode disposed on the first electrode and electrically contacting the light emitting elements; and

a second connection electrode disposed on the second electrode and electrically contacting the light emitting elements, wherein the conductive layer includes:

a first conductive layer including:

a lower metal layer disposed in the display area; and

a first pad wire disposed in the pad area;

a second conductive layer including:

gate electrodes disposed in the display area on the first conductive layer; and

a second pad wire disposed in the pad area; and

a third conductive layer including:

a first conductive pattern disposed in the display area on the second conductive layer; and

a pad electrode lower layer disposed in the pad area, and

the via layer includes:

a pad electrode upper layer disposed on the third conductive layer in the display area and disposed on the pad electrode lower layer in the pad area; and

a pad electrode capping layer disposed on the pad electrode upper layer.

9. The display device of claim 8 , further comprising:

a first gate insulating layer disposed between the first conductive layer and the second conductive layer;

a first interlayer insulating layer disposed between the second conductive layer and the third conductive layer; and

a first passivation layer disposed on the third conductive layer,

wherein each of the first gate insulating layer, the first interlayer insulating layer, and the first passivation layer includes an inorganic insulating material.

10. The display device of claim 9 , wherein

the pad electrode upper layer, the first electrode, and the second electrode include a same material, and

the pad electrode capping layer, the first connection electrode, and the second connection electrode include a same material.

11. The display device of claim 9 , wherein

the conductive layer further includes a fourth conductive layer disposed on the third conductive layer, and including a first voltage line and a second voltage line,

the display device further includes:

a second interlayer insulating layer disposed on the first passivation layer; and

a second passivation layer disposed on the fourth conductive layer.

12. The display device of claim 11 , wherein

the via layer includes trenches exposing a part of a top surface of the second passivation layer,

at least a part of the first electrode and the second electrode is disposed directly on the second passivation layer in the trenches, and

the light emitting elements are disposed in the trenches.

13. A wiring substrate comprising:

conductive layers including wires and conductive patterns disposed on a substrate; and

at least one insulating layer disposed between the conductive layers, wherein

the conductive layers include a first metal layer and a second metal layer disposed on the first metal layer,

the second metal layer contains copper (Cu),

the second metal layer has a grain size of about 155 nm or less and includes copper grains of a random grain orientation, and

the second metal layer has a resistivity of about 2.3 μΩcm or less.

14. The wiring substrate of claim 13 , wherein

the first metal layer has a thickness of about 500 Å or less, and

the second metal layer has a thickness in a range of about 3000 Å to about 17000 Å.

15. The wiring substrate of claim 13 , wherein

the first metal layer includes titanium (Ti), and

the second metal layer includes a copper alloy containing copper (Cu) as a main component and including at least one of silver (Ag), magnesium (Mg), aluminum (Al), indium (In), niobium (Nb), and boron (B) as an impurity metal.

16. The wiring substrate of claim 15 , wherein the second metal layer includes the impurity metal at a content of about 5 at % or less.

17. The wiring substrate of claim 13 , wherein the first metal layer includes: a titanium alloy containing titanium (Ti) as a main component and containing zinc (Zn) as an impurity metal, or a copper alloy containing copper (Cu) as a main component and containing at least one of silver (Ag), magnesium (Mg), aluminum (Al), indium (In), niobium (Nb), and boron (B) as an impurity metal.

18. The wiring substrate of claim 13 , wherein the first metal layer is made of at least one of zinc oxide (ZnO) and indium-zinc oxide (IZO).

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2022
From: PARK, JOON YONG; BAEK, GYUNG MIN; CHOI, SHIN IL; SONG, DO KEUN; KIM, YOUNG ROK; CHOUNG, JONG HYUN
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 059115/0834 →
Priority Claims (1)
KR 10-2021-0080867 · Jun 22, 2021 · national
Continuity (1)
Related Publication 20220406817A1 · Dec 22, 2022
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