IP Library › Granted Patent US 12,283,551
Granted Patent B2
US 12,283,551 · App. 18/473,420 · Granted Apr 22, 2025

Semiconductor device and manufacturing method thereof

Inventor: Akihito Sawanobori (Yokkaichi Mie, JP)
H01L23/552H01L21/568H01L23/3121H01L24/48H01L24/83H01L24/97H01L2224/48227H01L2924/181H01L2924/3025
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Quick Facts
Patent No.
US 12,283,551
App. No.
18/473,420
Granted
Apr 22, 2025
Kind
B2
Abstract

According to one embodiment, a semiconductor device includes a substrate; a semiconductor chip provided on the substrate; a resin covering the semiconductor chip; and a metal film provided on the resin. The metal film includes a first metal layer provided on the resin, a second metal layer provided on the first metal layer, and a third metal layer provided on the second metal layer. The first metal layer and the second metal layer contain a same material, and a particle diameter of the second metal layer is smaller than a particle diameter of the first metal layer.

Claims (15)

1. A manufacturing method of a semiconductor device comprising:

providing a semiconductor chip on a substrate;

covering the semiconductor chip with a resin;

forming a first metal layer around the resin at a temperature of 200° C. or higher;

forming a second metal layer, containing the same material as the first metal layer, on the first metal layer at a temperature of 150° C. or less;

forming a third metal layer on the second metal layer; and

providing a fourth metal layer between the resin and the first metal layer at a temperature of 150° C. or less.

2. The manufacturing method of the semiconductor device according to claim 1 , wherein

the first metal layer and the second metal layer are formed in different chambers.

3. The manufacturing method of the semiconductor device according to claim 1 , wherein

the first metal layer and the second metal layer contain copper.

4. The manufacturing method of the semiconductor device according to claim 1 , wherein

the first metal layer, the second metal layer, and the third metal layer are formed by sputtering.

5. The manufacturing method of the semiconductor device according to claim 1 , wherein

the first metal layer includes copper formed with a purity of 99.99% or more, and the second metal layer includes copper formed with a purity of less than 99.99%.

Priority Claims (1)
JP 2021-015672 · Feb 3, 2021 · national
Continuity (2)
Division 17462981 · Aug 31, 2021
Related Publication 20240014146A1 · Jan 11, 2024
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