Semiconductor device with doped structure
The present disclosure relates to a semiconductor device includes first and second source/drain (S/D) regions doped with lead (Pb) at a first dopant concentration. The semiconductor device also includes a channel region between the first and second S/D regions, where the channel region is doped with Pb at a second dopant concentration that is lower than the first dopant concentration. The semiconductor device further includes first and second S/D contacts in contact with the first and second S/D regions, respectively. The semiconductor device also includes a gate electrode over the channel region.
1. A semiconductor device, comprising:
first and second source/drain (S/D) regions doped with lead (Pb) at a first dopant concentration;
a channel region between the first and second S/D regions, wherein the channel region is doped with Pb at a second dopant concentration that is lower than the first dopant concentration;
first and second S/D contacts in contact with the first and second S/D regions, respectively; and
a gate electrode on the channel region.
2. The semiconductor device of claim 1 , wherein the first dopant concentration is between about 0.5% and about 50%.
3. The semiconductor device of claim 1 , wherein the second dopant concentration is between about 0.5% and about 50%.
4. The semiconductor device of claim 1 , wherein a ratio of the second dopant concentration to the first dopant concentration is between about 50% and about 80%.
5. The semiconductor device of claim 1 , further comprising third and fourth S/D regions under and in contact with the first and second S/D regions, respectively, wherein the third and fourth S/D regions are doped with Pb at a third dopant concentration that is lower than the first dopant concentration.
6. The semiconductor device of claim 5 , wherein the third and fourth S/D regions comprise silicon-lead compounds.
7. The semiconductor device of claim 5 , wherein the third dopant concentration is between about 25% and about 50%.
8. The semiconductor device of claim 5 , wherein the third dopant concentration is between about 0.5% and about 25%.
9. The semiconductor device of claim 1 , wherein the first and second S/D regions comprise silicon lead (SiPb), silicon germanium lead (SiGePb), silicon tin lead (SiSnPb), or silicon germanium tin lead (SiGeSnPb).
10. The semiconductor device of claim 1 , wherein the channel region comprises silicon lead (SiPb), silicon germanium lead (SiGePb), silicon tin lead (SiSnPb), or silicon germanium tin lead (SiGeSnPb).
11. A semiconductor device, comprising:
a fin structure on a substrate;
a first source/drain region on the fin structure and comprising a first region doped with a first lead concentration and a second region doped with a second lead concentration, wherein the second lead concentration is less than the first lead concentration;
a second source/drain region on the fin structure and comprising a third region doped with the first lead concentration and a fourth region doped with the second lead concentration; and
a channel region between the first and second source/drain regions, wherein the channel region is doped with lead at a third lead concentration.
12. The semiconductor device of claim 11 , wherein the third lead concentration is between about 50% and about 80% of the first lead concentration.
13. The semiconductor device of claim 11 , wherein the second lead concertation is lower than the first lead concentration.
14. The semiconductor device of claim 11 , wherein the third lead concentration is lower than the first lead concentration.
15. The semiconductor device of claim 11 , further comprising an electrode disposed on the channel region.
16. A semiconductor device, comprising:
a fin structure;
first and second source/drain regions disposed on the fin structure and doped with lead at a first concentration;
a gate structure disposed between the first and second source drain regions;
a first spacer in contact with the first source/drain region;
a second spacer in contact with the first spacer; and
a gate channel region below the gate structure and doped with lead at a second concentration.
17. The semiconductor device of claim 16 , wherein the second concentration is less than the first concentration.
18. The semiconductor device of claim 16 , wherein the second concentration is between about 0.5% and about 50%.
19. The semiconductor device of claim 16 , wherein the second spacer is L-shaped.
20. The semiconductor device of claim 16 , wherein the first and second source/drain regions comprise silicon lead (SiPb), silicon germanium lead (SiGePb), silicon tin lead (SiSnPb), or silicon germanium tin lead (SiGeSnPb).