Semiconductor device
View Patent ↗According to one embodiment, a semiconductor device includes first and second electrodes, first to third semiconductor regions, a first conductive part, a first gate electrode. The first semiconductor region is located on the first electrode and electrically connected with the first electrode. The second semiconductor region is located on the first semiconductor region. The third semiconductor region is located on a portion of the second semiconductor region. The first conductive part is located in the first semiconductor region with a first insulating part interposed. The first gate electrode is located on the first conductive part with a first inter-layer insulating part interposed. The first gate electrode faces the second semiconductor region via a first gate insulating layer. The second electrode is located on the second and third semiconductor regions and electrically connected with the second and third semiconductor regions, and the first conductive part.
1. A semiconductor device, comprising:
a first electrode;
a first semiconductor region located on the first electrode and electrically connected with the first electrode, the first semiconductor region being of a first conductivity type;
a second semiconductor region located on the first semiconductor region, the second semiconductor region being of a second conductivity type;
a third semiconductor region located on a portion of the second semiconductor region, the third semiconductor region being of the first conductivity type;
a first conductive part located in the first semiconductor region with a first insulating part interposed, the first conductive part including an impurity of the second conductivity type;
a first gate electrode located on the first conductive part with a first inter-layer insulating part interposed, the first gate electrode including an impurity of the first conductivity type and facing the second semiconductor region via a first gate insulating layer in a second direction perpendicular to a first direction, the first direction being from the first electrode toward the first semiconductor region; and
a second electrode located on the second and third semiconductor regions and electrically connected with the second semiconductor region, the third semiconductor region, and the first conductive part,
a first-conductivity-type impurity concentration of the first inter-layer insulating part being greater than a first-conductivity-type impurity concentration of the first insulating part,
a second-conductivity-type impurity concentration of the first inter-layer insulating part being greater than a second-conductivity-type impurity concentration of the first insulating part.
2. The device according to claim 1 , wherein
the first conductive part includes an impurity of the second conductivity type, and
the first gate electrode includes an impurity of the first conductivity type.
3. The device according to claim 2 , further comprising:
a second conductive part located in the first semiconductor region with a second insulating part interposed, the second conductive part including an impurity of the first conductivity type; and
a second gate electrode located on the second conductive part with a second inter-layer insulating part interposed, the second gate electrode including an impurity of the first conductivity type,
the second electrode being electrically connected with the second conductive part.
4. The device according to claim 3 , wherein
a plurality of the second semiconductor regions is arranged in the second direction,
a plurality of the third semiconductor regions is located on the plurality of second semiconductor regions,
a plurality of the first conductive parts is located in the first semiconductor region with a plurality of the first insulating parts interposed,
a plurality of the first gate electrodes is located on the plurality of first conductive parts with a plurality of the first inter-layer insulating parts interposed, and
the plurality of first gate electrodes faces the plurality of second semiconductor regions with a plurality of the first gate insulating layers interposed in the second direction.
5. The device according to claim 4 , wherein
the first semiconductor region includes:
a first region in which the plurality of first conductive parts is located;
a second region located around the first region along a first plane perpendicular to the first direction; and
a third region located between the first region and the second region in the second direction,
the second conductive part is located in the third region, and
the plurality of second semiconductor regions is located on the first and third regions.