IP Library › Granted Patent US 12,294,025
Granted Patent B2
US 12,294,025 · App. 17/645,992 · Granted May 6, 2025

Semiconductor apparatus and manufacturing method of semiconductor apparatus

Inventors: Motoyoshi Kubouchi (Matsumoto, JP); Takashi Yoshimura (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L29/7397H01L21/26506H01L29/36H01L29/861
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Quick Facts
Patent No.
US 12,294,025
App. No.
17/645,992
Granted
May 6, 2025
Kind
B2
Abstract

A region for adjusting a carrier lifetime is easily formed by a method in which damage to a predetermined surface of a semiconductor substrate is small. Provided is a semiconductor apparatus including: a semiconductor substrate having an upper surface and a lower surface; a first region provided in a region on an upper surface side of the semiconductor substrate and having a first chemical concentration peak of a first impurity at a first depth position; and a second region provided in a region different from the first region in the semiconductor substrate and having a second chemical concentration peak of the first impurity at the first depth position. At the first depth position, a concentration of a recombination center of the second region is lower than a concentration of the recombination centers of the first region.

Claims (66)

1. A semiconductor apparatus comprising:

a semiconductor substrate having an upper surface and a lower surface;

a first region provided in a region on an upper surface side of the semiconductor substrate and having a first chemical concentration peak of a first impurity at a first depth position; and

a second region provided in a region different from the first region in the semiconductor substrate and having a second chemical concentration peak of the first impurity at the first depth position,

wherein, at the first depth position, a concentration of a recombination center of the second region is lower than a concentration of the recombination centers of the first region.

2. The semiconductor apparatus according to claim 1 ,

wherein, at the first depth position, a ratio between a peak value of the first chemical concentration peak of the first region and a peak value of the second chemical concentration peak of the second region is closer to 1 than a ratio between a concentration of the recombination centers of the first region and a concentration of the recombination centers of the second region.

3. The semiconductor apparatus according to claim 2 ,

wherein the peak value of the first chemical concentration peak is identical to the peak value of the second chemical concentration peak.

4. The semiconductor apparatus according to claim 1 ,

wherein the first region has a concentration peak of the recombination center at the first depth position.

5. The semiconductor apparatus according to claim 4 ,

wherein, a first integral value obtained by integrating, in a depth direction, a hydrogen chemical concentration in the first region within a depth range of a full width at half maximum of the concentration peak of the recombination center in the first region is smaller than a second integral value obtained by integrating, in the depth direction, a hydrogen chemical concentration in the second region within the depth range.

6. The semiconductor apparatus according to claim 1 ,

wherein a hydrogen chemical concentration of the second region is higher than a hydrogen chemical concentration of the first region at the first depth position.

7. The semiconductor apparatus according to claim 1 ,

wherein a third integral value obtained by integrating, in a depth direction, a hydrogen chemical concentration within a range from the first depth position in the first region to the lower surface of the semiconductor substrate is smaller than a fourth integral value obtained by integrating, in the depth direction, a hydrogen chemical concentration within a range from the first depth position in the second region to the lower surface of the semiconductor substrate.

8. The semiconductor apparatus according to claim 1 , further comprising:

a first lower surface side region disposed between the first region and the lower surface of the semiconductor substrate; and

a second lower surface side region provided between the second region and the lower surface of the semiconductor substrate and having a peak of a hydrogen chemical concentration at a second depth position,

wherein a hydrogen chemical concentration at the second depth position of the first lower surface side region is smaller than a hydrogen chemical concentration at the second depth position of the second lower surface side region.

9. The semiconductor apparatus according to claim 1 , further comprising:

a first upper surface side region disposed between the first region and the upper surface of the semiconductor substrate; and

a second upper surface side region provided between the second region and the upper surface of the semiconductor substrate and having a peak of a hydrogen chemical concentration at a third depth position,

wherein a hydrogen chemical concentration at the third depth position of the second upper surface side region is larger than a hydrogen chemical concentration at the third depth position of the first upper surface side region.

10. The semiconductor apparatus according to claim 1 ,

wherein a chemical concentration distribution of the first impurity has an upper tail from the first chemical concentration peak toward the upper surface of the semiconductor substrate and a lower tail from the first chemical concentration peak toward the lower surface, and

wherein a chemical concentration of the first impurity steeply decreases in the upper tail than in the lower tail.

11. The semiconductor apparatus according to claim 1 ,

wherein the first impurity is helium.

12. The semiconductor apparatus according to claim 1 , further comprising:

a gate dielectric film provided in the upper surface of the semiconductor substrate.

13. The semiconductor apparatus according to claim 8 , further comprising:

an N type drift region provided in the semiconductor substrate; and

an N type buffer region provided between the drift region and the lower surface of the semiconductor substrate and having a higher doping concentration than the drift region,

wherein the buffer region below the second region includes the second lower surface side region, and

wherein the buffer region below the first region includes the first lower surface side region.

14. The semiconductor apparatus according to claim 13 ,

wherein the first lower surface side region has a chemical concentration peak of an N type dopant other than hydrogen.

15. The semiconductor apparatus according to claim 1 , further comprising:

a transistor portion having a P type collector region in the lower surface of the semiconductor substrate; and

a diode portion having an N type cathode region in the lower surface of the semiconductor substrate,

wherein the second region is provided in the transistor portion, and

wherein the first region is provided in the diode portion.

16. The semiconductor apparatus according to claim 9 ,

wherein the semiconductor substrate includes an N type drift region,

the semiconductor apparatus further comprising:

a transistor portion having a P type collector region between the drift region and the lower surface of the semiconductor substrate; and

a diode portion having an N type cathode region between the drift region and the lower surface of the semiconductor substrate,

wherein the second upper surface side region is provided in the transistor portion, and

wherein the first upper surface side region is provided in the diode portion.

17. The semiconductor apparatus according to claim 16 ,

wherein the transistor portion includes a P type base region disposed between the drift region and the upper surface of the semiconductor substrate, and

wherein the third depth position is disposed above a lower end of the base region.

18. The semiconductor apparatus according to claim 17 ,

wherein the transistor portion is disposed between the drift region and the upper surface of the semiconductor substrate and has a high concentration region having a higher doping concentration than the base region, and

wherein the third depth position is disposed at a position shallower than a lower end of the high concentration region.

19. The semiconductor apparatus according to claim 16 , further comprising:

an emitter electrode disposed above the upper surface of the semiconductor substrate,

wherein the third depth position has a distance of 1 μm or less in a depth direction from the upper surface of the semiconductor substrate in contact with the emitter electrode.

20. A semiconductor apparatus comprising:

a semiconductor substrate having an upper surface and a lower surface;

a first region provided in the semiconductor substrate; and

a second region provided at the same depth position as the first region in the semiconductor substrate,

wherein the first region has a higher concentration of a recombination center than the second region, and

wherein the second region has a higher hydrogen chemical concentration than the first region.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 26, 2021
From: KUBOUCHI, MOTOYOSHI; YOSHIMURA, TAKASHI
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 058477/0454 →
Priority Claims (1)
JP 2020-006033 · Jan 17, 2020 · national
Continuity (2)
Continuation PCTJP2021001135 · Jan 14, 2021
Related Publication 20220123133A1 · Apr 21, 2022
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