Inorganic-based embedded-die layers for modular semiconductive devices
A glass substrate houses an embedded multi-die interconnect bridge that is part of a semiconductor device package. Through-glass vias communicate to a surface for mounting on a semiconductor package substrate.
1. A semiconductive device, comprising:
an interconnect bridge in an opening in an inorganic substrate, wherein the inorganic substrate includes a die side and a land side;
a dielectric film over the inorganic substrate, over the interconnect bridge, and in the opening in the inorganic substrate;
a plurality of through-substrate vias that extend from the die side to the land side;
a first semiconductive device coupled to the interconnect bridge and to a first through-substrate via of the plurality of through-substrate vias, wherein the first semiconductive device includes substrate bond pads that couple to the first through-substrate via, and interconnect bridge bond pads that couple to the interconnect bridge, and wherein the first semiconductive device has a plurality of through-silicon-vias (TSVs) therein;
a subsequent semiconductive device coupled to the interconnect bridge and to a second through-substrate via of the plurality of through-substrate vias, wherein the subsequent semiconductive device includes substrate bond pads that couple to the second through-substrate via, and interconnect bridge bond pads that couple to the interconnect bridge; and
at least one first chiplet coupled to the first semiconductive device.
2. The semiconductive device of claim 1 , wherein the TSVs of the first semiconductive device are coupled to the interconnect bridge.
3. The semiconductive device of claim 1 , further including:
at least one subsequent chiplet coupled to the first semiconductive device.
4. The semiconductive device of claim 1 , further including:
at least one additional first chiplet coupled to the subsequent semiconductive device.
5. The semiconductive device of claim 4 , further including:
at least one subsequent chiplet coupled to the subsequent semiconductive device.
6. The semiconductive device of claim 1 , wherein the first semiconductive device comprises an additional substrate bond pad.
7. The semiconductive device of claim 6 , wherein the additional substrate bond pad contacts a solder film, which contacts a die-level via, which contacts a second-level via, and which contacts the first through-substrate via of the plurality of through-substrate vias.
8. The semiconductive device of claim 1 , wherein the inorganic substrate has a Z-height, and wherein the interconnect bridge has a Z-height that is within 96 percent of the inorganic substrate Z-height.
9. The semiconductive device of claim 1 , wherein the interconnect bridge is embedded in a through-hole in the inorganic substrate.
10. The semiconductive device of claim 1 , wherein the interconnect bridge is embedded in a recess in the inorganic substrate.
11. The semiconductive device of claim 1 , further including a semiconductor package substrate bonded to the first or second through-substrate via of the plurality of through-substrate vias.
12. The semiconductive device of claim 1 , further including:
a printed wiring board bonded to the inorganic substrate.
13. A method of fabricating a semiconductive device, the method comprising:
embedding an interconnect bridge in an opening in an inorganic substrate, wherein the inorganic substrate includes a die side and a land side;
forming a dielectric film over the inorganic substrate, over the interconnect bridge, and in the opening in the inorganic substrate;
forming a plurality of through-substrate vias that extend from the die side to the land side;
coupling a first semiconductive device to the interconnect bridge and to a first through-substrate via of the plurality of through-substrate vias, wherein the first semiconductive device includes substrate bond pads that couple to the first through-substrate via, and interconnect bridge bond pads that couple to the interconnect bridge, and wherein the first semiconductive device has a plurality of through-silicon-vias (TSVs) therein;
coupling a subsequent semiconductive device to the interconnect bridge and to a second through-substrate via of the plurality of through-substrate vias, wherein the subsequent semiconductive device includes substrate bond pads that couple to the second through-substrate via, and interconnect bridge bond pads that couple to the interconnect bridge; and
coupling at least one first chiplet to the first semiconductive device.
14. The method of claim 13 , further including:
coupling at least one subsequent chiplet to the first semiconductive device.
15. The method of claim 13 , further including:
coupling at least one additional first chiplet to the subsequent semiconductive device.
16. The method of claim 15 , further including:
coupling at least one subsequent chiplet to the subsequent semiconductive device.
17. The method of claim 16 , wherein the first semiconductive device comprises an additional substrate bond pad.
18. The method of claim 17 , wherein the additional substrate bond pad contacts a solder film, which contacts a die-level via, which contacts a second-level via, and which contacts the first through-substrate via of the plurality of through-substrate vias.
19. The method of claim 13 , wherein the interconnect bridge is embedded in a through-hole or in a recess in the inorganic substrate.
20. The method of claim 13 , further including:
bonding a printed wiring board to the inorganic substrate.