Semiconductor device with assistant cap and method for fabricating the same

1. A semiconductor device, comprising:

a substrate;

a first impurity region positioned in the substrate;

a first dielectric layer positioned on the substrate;

a first contact comprising:

a buried portion positioned along the first dielectric layer and on the first impurity region; and

a protruding portion positioned on the buried portion and protruding from the first dielectric layer;

a first top assistant cap covering the protruding portion;

a first top conductive layer positioned on the first top assistant cap; and

a first bottom assistant layer positioned between the first contact and the first impurity region;

wherein the first top assistant cap comprises germanium or silicon germanium;

wherein the first contact comprises silicon and/or germanium with substantially no oxygen and nitrogen;

wherein the first bottom assistant layer comprises an epitaxial material.

2. The semiconductor device of claim 1 , wherein a thickness of the protruding portion of the first contact and a thickness of the first bottom assistant layer are different.

3. The semiconductor device of claim 1 , wherein a thickness of the protruding portion of the first contact and a thickness of the first bottom assistant layer are substantially the same.

4. The semiconductor device of claim 1 , wherein a thickness ratio of a thickness of the buried portion to a thickness of the protruding portion is between about 30 and about 5.

5. The semiconductor device of claim 1 , wherein a width of a bottom surface of the first contact is less than a width of the first bottom assistant layer.

6. The semiconductor device of claim 5 , wherein a sidewall of the first contact may be tapered.

7. The semiconductor device of claim 6 , wherein the first dielectric layer comprises silicon oxide.

8. The semiconductor device of claim 7 , further comprising a well region positioned in the substrate, wherein the first impurity region is positioned in the well region.

9. The semiconductor device of claim 8 , wherein the well region and the first impurity region comprise different electrical types.

10. The semiconductor device of claim 1 , wherein a width of the first bottom assistant layer and a width of the first impurity region are different.

11. The semiconductor device of claim 1 , wherein a width of the first bottom assistant layer and a width of the first impurity region are substantially the same.

12. A semiconductor device, comprising:

a substrate;

a plurality of impurity regions separately positioned in the substrate;

a first dielectric layer positioned on the substrate;

a plurality of contacts comprising:

a plurality of buried portions positioned along the first dielectric layer and respectively correspondingly on the plurality of impurity regions; and

a plurality of protruding portions respectively correspondingly positioned on the plurality of buried portions and protruding from the first dielectric layer;

a plurality of top assistant caps respectively correspondingly covering the plurality of protruding portions;

a first top conductive layer positioned on the plurality of top assistant caps; and

a plurality of bottom assistant layers respectively correspondingly positioned between the plurality of impurity regions and the plurality of contacts;

wherein the plurality of top assistant caps comprise germanium or silicon germanium;

wherein the plurality of contacts comprise silicon and/or germanium with substantially no oxygen and nitrogen;

wherein the plurality of bottom assistant layers comprising an epitaxial material.

13. The semiconductor device of claim 12 , wherein a thickness of the plurality of protruding portions and a thickness of the plurality of bottom assistant layers are different.