IP Library › Granted Patent US 12,323,073
Granted Patent B2
US 12,323,073 · App. 17/789,586 · Granted Jun 3, 2025

Method for operating a power electronic converter device with floating cells

Inventors: Ioannis Tsoumas (Zürich, CH); Tobias Geyer (Ennetbaden, CH); Mario Schweizer (Rütihof, CH); Eduardo Rohr (Camberwell, AU); Frederick Kieferndorf (Baden, CH); Wim Van-der-Merwe (Ennetbaden, CH); Manuel Vetterli (Basel, CH); Christian Meier (Ennetbaden, CH)
Assignee: ABB Schweiz AG
H02M7/487H02M1/12H02M1/15H02M7/49H02M7/5395H02M1/0067H02M1/0095
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Quick Facts
Patent No.
US 12,323,073
App. No.
17/789,586
Granted
Jun 3, 2025
Kind
B2
Abstract

Described herein is a method of operating a power electronic converter device for an electrical power conversion system. The power electronic converter device includes a converter circuit including an input side, an output side, a first converter, and at least one second converter. The second converter includes at least one floating cell with a DC intermediate circuit and semiconductor devices. The method includes: switching the semiconductor devices of the floating cell at switching instants determined with optimized pulse patterns or carrier-based pulse width modulation; determining a fundamental voltage component for the floating cell; and generating the fundamental voltage component in the actual voltage of the floating cell by modifying the switching instants, such that a voltage V C AF of the DC intermediate circuit is lying in a given reference voltage range for balancing the DC intermediate circuit of the floating cell.

Claims (31)

1. A method for operating a power electronic converter device for an electrical power conversion system, the power electronic converter device comprising a converter circuit including an input side with input terminals, an output side with at least one AC output terminal, a first converter with semiconductor devices connected to the input terminals and at least one second converter connected between an AC output of the first converter and the AC output terminal, the at least one second converter comprising at least one floating cell with a DC intermediate circuit and semiconductor devices, the method comprising:

switching the semiconductor devices of the at least one floating cell at switching instants determined with optimized pulse patterns or carrier-based pulse width modulation;

determining a fundamental voltage component for the at least one floating cell, wherein the fundamental voltage component depends on a difference between an actual voltage V C AF of the DC intermediate circuit of the at least one floating cell and a reference value V C AF* for a voltage of the DC intermediate circuit;

generating the fundamental voltage component in the actual voltage of the DC intermediate circuit of the at least one floating cell by modifying the switching instants, such that the actual voltage V C AF of the DC intermediate circuit is in a given reference voltage range;

switching the semiconductor devices of the first converter at switching instants determined with optimized pulse patterns or carrier-based pulse width modulation; and

generating a fundamental voltage component in a voltage output by the first converter by modifying the switching instants applied to the first converter, wherein the fundamental voltage component in the voltage output by the first converter is determined based on the fundamental voltage component determined for the at least one floating cell,

wherein the fundamental voltage component of the voltage output by the first converter is modified, such that a fundamental component of a voltage at the at least one AC output terminal is kept constant; and/or wherein the fundamental voltage component of the at least one floating cell generated by the at least one floating cell is canceled out by the fundamental voltage component of the voltage output by the first converter.

2. The method according to claim 1 , wherein the fundamental voltage component of the at least one floating cell is generated in the actual voltage of the at least one floating cell, such that the actual voltage V C AF of the DC intermediate circuit is kept at the reference value V C AF* .

3. The method according to claim 1 , wherein the fundamental voltage component of the at least one floating cell is zero when the DC intermediate circuit of the at least one floating cell is at the reference value V C AF* .

4. The method according to claim 1 , wherein the fundamental voltage component of the at least one floating cell is generated by a PI controller, whose input is the difference between the actual voltage V C AF of the DC intermediate circuit and the reference value V C AF* .

5. The method of claim 4 , wherein a variable gain of the PI controller is adjusted based on a fundamental component of a phase current flowing through the at least one floating cell.

6. The method according to claim 1 , wherein the fundamental voltage component of the at least one floating cell has a phase angle relative to a fundamental component of a phase current flowing through the at least one floating cell in a range of −85° to +85° when charging the at least one floating cell and of 95° to 265° when discharging the at least one floating cell.

7. The method according to claim 6 , wherein the fundamental voltage component of the at least one floating cell is in phase with the fundamental component of the phase current when charging the at least one floating cell; and wherein the fundamental voltage component of the at least one floating cell has a phase difference of 180° from the fundamental component of the phase current when discharging the at least one floating cell.

8. The method according to claim 1 , wherein the switching instants of the at least one floating cell are modified by adjusting switching angles of the optimized pulse patterns; wherein an adjustment of the switching angles of the semiconductor devices of the at least one floating cell is based on a sign of a corresponding switching transition; and/or wherein an adjustment of the switching angles of the semiconductor devices of the at least one floating cell is based on gains related to nominal switching angles of the optimized pulse patterns.

9. The method according to claim 1 , wherein, when the at least one floating cell is switched with carrier-based pulse width modulation, the switching instants of the at least one floating cell are modified by adding a sinusoidal signal at a fundamental frequency to a reference of the carrier-based pulse width modulation.

10. The method according to claim 1 , wherein, when both the first converter and the at least one floating cell are switched with optimized pulse patterns, the optimized pulse patterns of the first converter and the at least one floating cell are selected such that a weighted total harmonic distortion of a sum of the voltages of the DC intermediate circuit and the voltage output by the first converter is minimized.

11. A non-transitory computer program comprising computer-executable program code portions having program code instructions loaded into a computer-based control device, wherein the non-transitory computer program is configured to operate a power electronic converter device for an electrical power conversion system, the power electronic converter device comprising a converter circuit including an input side with input terminals, an output side with at least one AC output terminal, a first converter with semiconductor devices connected to the input terminals and at least one second converter connected between an AC output of the first converter and the AC output terminal, the at least one second converter comprising at least one floating cell with a DC intermediate circuit and semiconductor devices, the non-transitory computer program further configured to:

switch the semiconductor devices of the at least one floating cell at switching instants determined with optimized pulse patterns or carrier-based pulse width modulation;

determine a fundamental voltage component for the at least one floating cell, wherein the fundamental voltage component depends on a difference between an actual voltage V C AF of the DC intermediate circuit of the at least one floating cell and a reference value V C AF* for a voltage of the DC intermediate circuit;

generate the fundamental voltage component in the actual voltage of the DC intermediate circuit of the at least one floating cell by modifying the switching instants, such that the actual voltage V C AF of the DC intermediate circuit is in a given reference voltage range;

switch the semiconductor devices of the first converter at switching instants determined with optimized pulse patterns or carrier-based pulse width modulation; and

generate a fundamental voltage component in a voltage output by the first converter by modifying the switching instants applied to the first converter, wherein the fundamental voltage component in the voltage output by the first converter is determined based on the fundamental voltage component determined for the at least one floating cell,

wherein the fundamental voltage component of the voltage output by the first converter is modified, such that a fundamental component of a voltage at the at least one AC output terminal is kept constant; and/or wherein the fundamental voltage component of the at least one floating cell generated by the at least one floating cell is canceled out by the fundamental voltage component of the voltage output by the first converter.

12. The non-transitory computer program of claim 11 , wherein the non-transitory computer program is stored on a non-transitory computer-readable storage medium.

13. A power electronic converter device for an electrical power conversion system, the power electronic converter device comprising: a converter circuit including an input side with input terminals, an output side with at least one AC output terminal, a first converter with semiconductor devices connected to the input terminals and at least one second converter connected between an AC output of the first converter and an AC output terminal, the at least one second converter comprising at least one floating cell with a DC intermediate circuit and semiconductor devices; and a control device for driving the semiconductor devices of the at least one floating cell, wherein the control device is configured to:

switch the semiconductor devices of the at least one floating cell at switching instants determined with optimized pulse patterns or carrier-based pulse width modulation;

determine a fundamental voltage component for the at least one floating cell, wherein the fundamental voltage component depends on a difference between an actual voltage V C AF of the DC intermediate circuit of the at least one floating cell and a reference value V C AF* for a voltage of the DC intermediate circuit;

generate the fundamental voltage component in the actual voltage of the DC intermediate circuit of the at least one floating cell by modifying the switching instants, such that the actual voltage V C AF of the DC intermediate circuit is in a given reference voltage range;

switch the semiconductor devices of the first converter at switching instants determined with optimized pulse patterns or carrier-based pulse width modulation; and

generate a fundamental voltage component in a voltage output by the first converter by modifying the switching instants applied to the first converter, wherein the fundamental voltage component in the voltage output by the first converter is determined based on the fundamental voltage component determined for the at least one floating cell,

wherein the fundamental voltage component of the voltage output by the first converter is modified, such that a fundamental component of a voltage at the at least one AC output terminal is kept constant; and/or wherein the fundamental voltage component of the at least one floating cell generated by the at least one floating cell is canceled out by the fundamental voltage component of the voltage output by the first converter.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2022
From: TSOUMAS, IOANNIS; GEYER, TOBIAS; SCHWEIZER, MARIO; ROHR, EDUARDO; KIEFERNDORF, FREDERICK; VAN-DER-MERWE, WIM; VETTERLI, MANUEL; MEIER, CHRISTIAN
To: ABB SCHWEIZ AG
Reel/Frame 060534/0433 →
Priority Claims (1)
EP 19220176 · Dec 31, 2019 · regional
Continuity (1)
Related Publication 20230042964A1 · Feb 9, 2023
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