IP Library › Granted Patent US 12,483,159
Granted Patent B2
US 12,483,159 · App. 18/523,588 · Granted Nov 25, 2025

Controller for controlling a balancer circuit

Inventors: Sebastian Pedro Rosado (Nuremberg, DE); Zhaohui Wang (Shenzhen, CN); Francisco Daniel Freijedo Fernández (Nuremberg, DE)
Assignee: Huawei Technologies Co., Ltd.
H02M7/487H02M1/0003H02M1/0012H02M1/0022H02M7/483
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,483,159
App. No.
18/523,588
Granted
Nov 25, 2025
Kind
B2
Abstract

A controller controls a balancer circuit, and is configured to: determine a difference value between a first DC link voltage value across a first DC link of a power converter and a second DC link voltage value across a second DC link of the power converter; determine a phase-angle and a magnitude of the difference value for an integer harmonic of a predetermined grid frequency; and provide a switching signal for switching between the first DC link and the second DC link based on the phase-angle and the magnitude. The controller is also configured to control a mid-point current at a mid-point terminal of the power converter in terms of magnitude and direction based on the switching signal.

Claims (59)

1 . A controller for controlling a balancer circuit, the controller being configured to:

determine a difference value between a first direct current (DC) link voltage value across a first DC link of a power converter and a second DC link voltage value across a second DC link of the power converter;

determine a phase-angle and a magnitude of the difference value for an integer harmonic of a predetermined grid frequency;

provide a switching signal for switching between the first DC link and the second DC link based on the phase-angle and the magnitude;

control a mid-point current at a mid-point terminal of the power converter in terms of magnitude and direction based on the switching signal; and

determine a sign for the switching based on the phase-angle of the difference value,

wherein the controller comprises a current control loop configured to control the mid-point current based on the sign and the magnitude of the difference value,

wherein the controller is further configured to:

determine a current control reference value for the current control loop based on the magnitude of the difference value and a measurement value of a converter current processed by the power converter;

determine the current control reference value based on a linear relationship with the measurement value of the converter current within a predetermined range of the measurement value of the converter current; and

set the current control reference value to a predefined value when the measurement value of the converter current is within a range above the predetermined range of the measurement value of the converter current,

wherein the first DC link comprises a first DC link capacitor and the controller is configured to receive a measurement value of a voltage across the first DC link capacitor as the first DC link voltage value,

wherein the second DC link comprises a second DC link capacitor and the controller is configured to receive a measurement value of a voltage across the second DC link capacitor as the second DC link voltage value, and

wherein the balancer circuit comprises:

a first switch configured to switch the first DC link of the power converter based on the switching signal; and

a second switch configured to switch the second DC link of the power converter based on the switching signal.

2 . The controller of claim 1 ,

wherein the controller is further configured to determine the phase-angle of the difference value based on a phase-lock-loop.

3 . The controller of claim 1 ,

wherein controller is further configured to determine the phase-angle of the difference value based on a discrete Fourier transform calculation.

4 . The controller of claim 3 ,

wherein the controller is further configured to determine the phase-angle of the difference value based on a real-time Discrete Fourier Transform calculation.

5 . The controller of claim 1 ,

wherein the current control loop is configured to regulate an average value of the mid-point current.

6 . The controller of claim 1 ,

wherein an output of the current control loop is configured to provide a switching reference value for the switching of the balancer circuit.

7 . The controller of claim 1 ,

wherein the controller is further configured to instruct the balancer circuit to stop processing power, upon detecting that the measurement value of the converter current is within a range below the predetermined range of the measurement value of the converter current.

8 . The controller of claim 1 ,

wherein the controller is further configured to determine the phase-angle and the magnitude of the difference value with respect to a reference frame.

9 . The controller of claim 8 ,

wherein the reference frame is stored in a memory section comprising samples of a wave at the integer harmonic of the predetermined grid frequency.

10 . The controller of claim 8 ,

wherein the reference frame is a predefined frame at three times a line frequency of the power converter.

11 . The controller of claim 1 ,

wherein the predetermined grid frequency corresponds to a frequency of 50 Hz or 60 Hz, and/or

wherein the integer harmonic of the predetermined grid frequency corresponds to a third harmonic of the predetermined grid frequency.

12 . The controller of claim 1 ,

wherein the power converter comprises a three-phase DC-AC converter for converting between DC power and three-phase alternating current (AC) power, based on a multilevel circuit topology.

13 . The controller of claim 1 ,

wherein the power converter comprises a three-phase AC-DC converter for converting between three-phase AC power and DC power, based on a multilevel circuit topology.

14 . The controller of claim 1 , wherein the controller is further configured to:

receive the first DC link voltage value across the first DC link; and

receive the second DC link voltage value across the second DC link.

15 . A method for controlling a balancer circuit using a controller, the method comprising:

determining a difference value between a first DC link voltage value across a first DC link of a power converter and a second DC link voltage value across a second DC link of the power converter;

determining a phase-angle and a magnitude of the difference value for an integer harmonic of a predetermined grid frequency;

providing a switching signal for switching between the first DC link and the second DC link based on the phase-angle and the magnitude in order to control a mid-point current at a mid-point terminal of the power converter in terms of magnitude and direction based on the switching signal; and

determining a sign for the switching based on the phase-angle of the difference value,

wherein the controller comprises a current control loop configured to control the mid-point current based on the sign and the magnitude of the difference value,

wherein the method further comprises:

determining a current control reference value for the current control loop based on the magnitude of the difference value and a measurement value of a converter current processed by the power converter;

determining the current control reference value based on a linear relationship with the measurement value of the converter current within a predetermined range of the measurement value of the converter current; and

setting the current control reference value to a predefined value when the measurement value of the converter current is within a range above the predetermined range of the measurement value of the converter current,

wherein the first DC link comprises a first DC link capacitor and the controller is configured to receive a measurement value of a voltage across the first DC link capacitor as the first DC link voltage value,

wherein the second DC link comprises a second DC link capacitor and the controller is configured to receive a measurement value of a voltage across the second DC link capacitor as the second DC link voltage value, and

wherein the balancer circuit comprises:

a first switch configured to switch the first DC link of the power converter based on the switching signal; and

a second switch configured to switch the second DC link of the power converter based on the switching signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 5, 2025
From: ROSADO, SEBASTIAN; WANG, ZHAOHUI; FREIJEDO FERNÁNDEZ, FRANCISCO DANIEL
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 072176/0138 →
Continuity (2)
Continuation PCTEP2021082422 · Nov 22, 2021
Related Publication 20240097550A1 · Mar 21, 2024
References Cited (34)
US 10516365B1 · Serban · 2019 [cited by examiner]
US 12323073B2 · Tsoumas · 2025 [cited by examiner]
US 20020172058A1 · Szczesny · 2002 [cited by examiner]
US 20080316779A1 · Jayaraman · 2008 [cited by examiner]
US 20090160254A1 · Wu · 2009 [cited by examiner]
US 20110134672A1 · Sato · 2011 [cited by examiner]
US 20120281442A1 · Revelant · 2012 [cited by examiner]
US 20140036555A1 · Kolhatkar · 2014 [cited by examiner]
US 20150131349A1 · El-Barbari · 2015 [cited by examiner]
US 20160276919A1 · Geyer · 2016 [cited by examiner]
US 20180062537A1 · Wang · 2018 [cited by examiner]
US 20200251981A1 · Thompson · 2020 [cited by examiner]
US 20200295668A1 · Bortis · 2020 [cited by examiner]
US 20210083597A1 · Hayashi · 2021 [cited by examiner]
US 20210273551A1 · Zhang · 2021 [cited by examiner]
US 20230071003A1 · Zhou · 2023 [cited by examiner]
US 20230223886A1 · Abarzadeh · 2023 [cited by examiner]
US 20230238896A1 · Xu · 2023 [cited by examiner]
US 20240204650A1 · Tsoumas · 2024 [cited by examiner]
US 20240266972A1 · Rosado · 2024 [cited by examiner]
US 20240305218A1 · Chen · 2024 [cited by examiner]
US 20240333124A1 · Rosado · 2024 [cited by examiner]
US 20240348152A1 · Qin · 2024 [cited by examiner]
US 20250023487A1 · Michalczuk · 2025 [cited by examiner]
US 20250047213A1 · Darivianakis · 2025 [cited by examiner]
CN 102355142A · 2012 [cited by applicant]
CN 104253554A · 2014 [cited by applicant]
CN 105490572A · 2016 [cited by applicant]
CN 110768237A · 2020 [cited by applicant]
CN 110912435A · 2020 [cited by applicant]
JP H09182455A · 1997 [cited by applicant]
WO 2020026430A1 · 2020 [cited by applicant]
Umbria et al, “Voltage balancing in three-level neutral-point-clamped converters via Luenberger observer”, Control Engineering Practice, vol. 25, pp. 36-44 (Jan. 11, 2014). [cited by applicant]
Annette Von Jouanne et al., “A Multilevel Inverter Approach Providing DC-Link Balancing, Ride-Through Enhancement, and Common-Mode Voltage Elimination,” IEEE Transactions on Industrial Electronics, vol. 49, No. 4, total… [cited by applicant]