Granted Patent B2

US 12,328,081 · App. 16/427,023 · Granted Jun 10, 2025

Inventor: Paul Thibado (Fayetteville, AR)

Assignee: Board of Trustees of the University of Arkansas

H02N2/186B81B3/0021H01M10/052H02N1/08H02N2/181H10N30/308H10N30/85H10N35/85

Abstract

Claims (28)

1. A system for harvesting energy, comprising:

a substrate having an initial thickness between a first face of the substrate and an opposite face of the substrate;

a second face of the substrate bounding an open well region extending from the first face of the substrate toward the second face of the substrate;

a free-standing membrane positioned over the well region and supported by the first face of the substrate, wherein the free-standing membrane is free to vibrate in response to ambient energy, wherein vibration of the membrane defines cyclical ripple formations along a first surface of the membrane, wherein each ripple formation alternates between a peak and a trough over the well region;

a tip structure extending from the second face of the substrate;

a first contact connected to the first face of the substrate;

a second contact connected to the tip structure;

a voltage source connected to the second contact inducing a capacitive region of charges between the tip and the membrane,

wherein a distance between the tip and the membrane varies with respective peaks and troughs, and

wherein the capacitive region between the tip and the membrane stores and emits the charges in cycles according to the distance between the tip and the membrane; and

a storage capacitor connected to the membrane and receiving emitted charges from the capacitive region when the distance between the tip and the membrane is increasing during ripple peak periods.

2. A system according to claim 1 , wherein the voltage source delivers charges to the capacitive region when the distance between the tip and the membrane is decreasing during ripple trough periods.

3. A system according to claim 1 , further comprising a computer system in electronic communication with at least one of the first contact and the second contact and having at least one processor and a memory, and wherein the memory stores instructions which, when executed by the at least one processor, controls charge storage and charge transmission from the membrane.

4. A system according to claim 1 , further comprising a pattern of trenches across the first face of the substrate, wherein each trench isolates either a tip or a first contact from adjacent portions of the substrate.

5. A system according to claim 1 , further comprising an electrical circuit connecting the voltage source, the storage capacitor, tip, and the membrane to a common ground, wherein the circuit comprises a first diode connected to the membrane or tip, the common ground in parallel with the fixed capacitor, and a second diode connected to the membrane or tip in series with the fixed capacitor connected to the common ground.

6. A system according to claim 5 , further comprising an array of respective first diodes and second diodes connecting respective regions of the membrane or tip to the voltage source, the fixed storage capacitor, and the common ground.

7. A system according to claim 5 , wherein the circuit connecting components, selected from the voltage source, the fixed storage capacitor, tip and the membrane, are connected to each other via a circuit board that is separate from the substrate.

8. A system according to claim 1 , wherein the freestanding membrane is a freestanding graphene membrane.

9. A system according to claim 1 , wherein the freestanding membrane is one of a bi-layer of graphene, a tri-layer of graphene, and a multi-layer of graphene.

10. A system according to claim 1 , further comprising an ammeter connected via a switch to operate in parallel to the storage capacitor, wherein the ammeter measures charge in the storage capacitor.

11. A system according to claim 1 , wherein the capacitive region has a capacitance cycle from a minimum capacitance of about 0.001 femto-farad to a maximum capacitance of about 1000 femto-farad.

12. A system according to claim 11 , wherein the minimum capacitance corresponds to time periods in which the distance between the tip and the membrane is maximized during ripple peak periods.

13. A system according to claim 12 , wherein the maximum capacitance corresponds to time periods in which the distance between the tip and the membrane is minimized during ripple trough periods.

14. A system according to claim 1 , wherein the capacitive region is subject to current tunneling when the distance between the tip and the membrane is minimized during ripple trough periods.

15. A system according to claim 1 , wherein the ambient energy is thermal energy.

16. A system according to claim 1 , wherein the ambient energy is kinetic energy from atoms in the freestanding membrane.

17. A system according to claim 1 , wherein the freestanding membrane comprises graphene, MoS2, MoSe2, WS2, WSe2, ReS2, ReSe2, BN, combinations of a transition metal and another element (“MX2”), or a combination thereof.

18. A system according to claim 1 , wherein the membrane has an average thickness of from 0.3 nm to 3.0 nm, from 0.3 nm to 2.0 nm, from 0.3 nm to 1.0 nm, or from 0.3 nm to 0.6 nm.

Assignments (1)

Continuity (3)

References Cited (155)