IP Library Granted Patent US 12,338,528
Granted Patent B2
US 12,338,528 · App. 17/835,073 · Granted Jun 24, 2025

Method for fabricating semiconductor device with deposition cycles of chemical vapor deposition process to form composite contact structure

Inventors: Yu-Chang Chang (Taoyuan, TW); Po-Hung Chen (Taoyuan, TW)
Assignee: NANYA TECHNOLOGY CORPORATION
C23C16/08C23C16/28C23C16/45523C23C16/56C23C28/322H01L21/02697H01L21/302
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Quick Facts
Patent No.
US 12,338,528
App. No.
17/835,073
Granted
Jun 24, 2025
Kind
B2
Abstract

The present application discloses a method for fabricating a semiconductor device. The method includes forming a first dielectric layer on a substrate; forming an expanded hole in the first dielectric layer; conformally forming an adhesive layer in the expanded hole by a first chemical vapor deposition process; conformally forming a first conductive layer on the adhesive layer by a second chemical vapor deposition process; and forming a first conductive structure on the first conductive layer by a third chemical vapor deposition process. The adhesive layer, the first conductive layer, and the first conductive structure together configure a composite contact structure. The second chemical vapor deposition process includes an initial deposition step and subsequent deposition cycles repeated until the first conductive layer is formed to a predetermined thickness.

Claims (37)

1. A method for fabricating a semiconductor device, comprising:

forming a first dielectric layer on a substrate;

forming an expanded hole in the first dielectric layer;

conformally forming an adhesive layer in the expanded hole by a first chemical vapor deposition process, wherein the adhesive layer includes a bottom portion disposed on the substrate and a sidewall portion disposed on the first dielectric layer, and a thickness of the bottom portion of the adhesive layer is greater than a thickness of the sidewall portion of the adhesive layer, wherein a thickness of the sidewall portion of the adhesive layer gradually decreases from bottom ends of the expanded hole towards top ends of the expanded hole, wherein the adhesive layer is formed of titanium, titanium nitride, or tantalum, tantalum nitride;

conformally forming a first conductive layer on the adhesive layer by a second chemical vapor deposition process, wherein the first conductive layer includes a bottom portion disposed on the bottom portion of the adhesive layer and a sidewall portion disposed on the sidewall portion of the adhesive layer, and a thickness of the bottom portion of the first conductive layer gradually decreases from the bottom ends of the expanded hole towards the top ends of the expanded hole; and

forming a first conductive structure on the first conductive layer by a third chemical vapor deposition process;

wherein the adhesive layer, the first conductive layer, and the first conductive structure together configure a composite contact structure;

wherein the second chemical vapor deposition process comprises an initial deposition step and subsequent deposition cycles repeated until the first conductive layer is formed to a predetermined thickness, wherein one deposition cycle of the deposition cycles of the second chemical vapor deposition process comprises exposing the adhesive layer to a pulse of a silicon-containing reducing agent and then exposing the adhesive layer to a pulse of a tungsten-containing precursor after the exposure to the pulse of the silicon-containing reducing agent.

2. The method for fabricating the semiconductor device of claim 1 , further comprising performing an etching process to remove overhang of the first conductive layer.

3. The method for fabricating the semiconductor device of claim 2 , wherein the initial deposition step of the second chemical vapor deposition process comprises introducing a borane-containing precursor pulse and a subsequent tungsten-containing precursor pulse.

4. The method for fabricating the semiconductor device of claim 3 , wherein the borane-containing precursor pulse of the initial deposition step of the second chemical vapor deposition process comprises borane, diborane, triborane, or boron halides with hydrogen.

5. The method for fabricating the semiconductor device of claim 4 , wherein the tungsten-containing precursor pulse of the initial deposition step of the second chemical vapor deposition process comprises tungsten hexafluoride, tungsten hexachloride, or tungsten hexacarbonyl.

6. The method for fabricating the semiconductor device of claim 5 , wherein a substrate temperature during introducing the borane-containing precursor pulse of the initial deposition step of the second chemical vapor deposition process is between about 200° C. and about 475° C.

7. The method for fabricating the semiconductor device of claim 6 , wherein a chamber pressure during introducing the borane-containing precursor pulse of the initial deposition step of the second chemical vapor deposition process is between about 1 Torr and about 350 Torr.

8. The method for fabricating the semiconductor device of claim 7 , wherein a substrate temperature during introducing the tungsten-containing precursor pulse of the initial deposition step of the second chemical vapor deposition process is between about 200° C. and about 475° C.

9. The method for fabricating the semiconductor device of claim 8 , wherein a chamber pressure during introducing the tungsten-containing precursor pulse of the initial deposition step of the second chemical vapor deposition process is between about 1 Torr and about 350 Torr.

10. The method for fabricating the semiconductor device of claim 1 , wherein the silicon-containing reducing agent of the deposition cycles of the second chemical vapor deposition process comprises silane.

11. The method for fabricating the semiconductor device of claim 10 , wherein the tungsten-containing precursor of the deposition cycles of the second chemical vapor deposition process comprises tungsten hexafluoride, tungsten hexachloride, or tungsten hexacarbonyl.

12. The method for fabricating the semiconductor device of claim 11 , wherein a substrate temperature during introducing the pulse of the silicon-containing reducing agent of the deposition cycles of the second chemical vapor deposition process is between about 200° C. and about 475° C.

13. The method for fabricating the semiconductor device of claim 12 , wherein a chamber pressure during introducing the pulse of the silicon-containing reducing agent of the deposition cycles of the second chemical vapor deposition process is between about 1 Torr and about 350 Torr.

14. The method for fabricating the semiconductor device of claim 13 , wherein a substrate temperature during introducing the pulse of the tungsten-containing precursor of the deposition cycles of the second chemical vapor deposition process is between about 200° C. and about 475° C.

15. The method for fabricating the semiconductor device of claim 14 , wherein a chamber pressure during introducing the pulse of the tungsten-containing precursor of the deposition cycles of the second chemical vapor deposition process is about 1 Torr and about 350 Torr.

16. The method for fabricating the semiconductor device of claim 15 , wherein a width of top ends of the expanded hole is less than a width of middle ends of the expanded hole.

17. The method for fabricating the semiconductor device of claim 16 , wherein an aspect ratio of the expanded hole is greater than 7.

18. The method for fabricating the semiconductor device of claim 17 , wherein the third chemical vapor deposition process comprises an initial deposition step, a deposition cycles, and a bulk step;

wherein the bulk step of the third chemical vapor deposition comprises sequentially introducing a tungsten-containing precursor and a reducing agent;

wherein the tungsten-containing precursor comprises tungsten hexafluoride, tungsten chloride, or tungsten hexacarbonyl, and the reducing agent comprises hydrogen gas, silane, disilane, hydrazine, diborane, or germane.

19. A method for fabricating a semiconductor device, comprising:

forming a first dielectric layer on a substrate;

forming an expanded hole in the first dielectric layer;

conformally forming an adhesive layer in the expanded hole by a first chemical vapor deposition process, wherein the adhesive layer includes a bottom portion disposed on the substrate and a sidewall portion disposed on the first dielectric layer, and a thickness of the bottom portion of the adhesive layer is greater than a thickness of the sidewall portion of the adhesive layer, wherein a thickness of the sidewall portion of the adhesive layer gradually decreases from bottom ends of the expanded hole towards top ends of the expanded hole, wherein the adhesive layer is formed of titanium, titanium nitride, or tantalum, tantalum nitride;

conformally forming a first conductive layer on the adhesive layer by a second chemical vapor deposition process, wherein the first conductive layer includes a bottom portion disposed on the bottom portion of the adhesive layer and a sidewall portion disposed on the sidewall portion of the adhesive layer, and a thickness of the bottom portion of the first conductive layer gradually decreases from the bottom ends of the expanded hole towards the top ends of the expanded hole;

performing a post-treatment to the first conductive layer;

forming a first conductive structure on the first conductive layer by a third chemical vapor deposition process;

wherein the adhesive layer, the first conductive layer, and the first conductive structure together configure a composite contact structure;

wherein the second chemical vapor deposition process comprises an initial deposition step and subsequent deposition cycles repeated until the first conductive layer is formed to a predetermined thickness, wherein one deposition cycle of the deposition cycles of the second chemical vapor deposition process comprises exposing the adhesive layer to a pulse of a silicon-containing reducing agent and then exposing the adhesive layer to a pulse of a tungsten-containing precursor after the exposure to the pulse of the silicon-containing reducing agent;

wherein the post-treatment comprises introducing diborane pulses to the first conductive layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2022
From: CHANG, YU-CHANG; CHEN, PO-HUNG
To: NANYA TECHNOLOGY CORPORATION
Reel/Frame 061417/0544 →
Continuity (1)
Related Publication 20230399738A1 · Dec 14, 2023
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