IP Library › Granted Patent US 12,341,305
Granted Patent B2
US 12,341,305 · App. 17/968,088 · Granted Jun 24, 2025

Electronic device comprising connector and method for sensing disconnection

Inventors: Jaehwan Lee (Gyeonggi-do, KR); Hoyeong Lim (Gyeonggi-do, KR); Cheolyoon Chung (Gyeonggi-do, KR); Hyunseok Kim (Gyeonggi-do, KR); Incheol Baek (Gyeonggi-do, KR); Yongseung Yi (Gyeonggi-do, KR)
Assignee: Samsung Electronics Co., Ltd
H01R24/60G06F1/1613H01R13/6683H01R13/70
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,341,305
App. No.
17/968,088
Granted
Jun 24, 2025
Kind
B2
Abstract

Disclosed is an electronic device including: a USB connector connected to a USB plug of an external device; a high-speed interface; a voltage source for supplying a voltage to the high-speed interface; a first circuit portion connected to a ground portion, and has a second impedance higher than a first impedance of the high-speed interface; and a processor. The processor is configured to monitor the external device by using the high-speed interface in a first interval of a first frame, form a disconnection sensing path by forming a connection between the first circuit portion and a second circuit portion of the external device, and use the disconnection sensing path to determine whether the connection between the USB connector and the USB plug has been disconnected. The second circuit portion may have a fourth impedance higher than a third impedance of an external high-speed interface. Various other embodiments are also possible.

Claims (46)

1. An electronic device comprising:

a housing;

a USB connector formed at one side of the housing and connected to a USB plug of an external device;

a high speed interface for transmitting and/or receiving data to and/or from the external device connected to the USB connector;

a voltage source for supplying a first voltage to the high speed interface;

a first circuit portion connected to a ground portion having a second voltage lower than the first voltage and having a second impedance higher than a first impedance of the high speed interface; and

a processor,

wherein the processor is configured to:

monitor the external device using the high speed interface in a first section of a first frame;

transmit and/or receive the data to and/or from the external device using the high speed interface in the first section;

connect the first circuit portion to a second circuit portion of the external device so as to form a disconnection sensing path in at least a portion of a second section other than the first section in the first frame; and

determine whether a connection between the USB connector and the USB plug is released using the disconnection sensing path,

wherein the second circuit portion has a fourth impedance higher than a third impedance of an external high speed interface of the external device.

2. The electronic device of claim 1 , further comprising:

a disconnection sensing driver for determining whether the data is transmitted at a specified interval through a path where the high speed interface and the external high speed interface are connected to each other.

3. The electronic device of claim 1 , wherein the high speed interface includes a first switch for selectively connecting the high speed interface to the USB connector,

wherein the external high speed interface includes a second switch for selectively connecting the external high speed interface to the USB plug,

wherein the second circuit portion includes a third switch for selectively connecting the second circuit portion to the USB plug.

4. The electronic device of claim 3 , wherein the processor is configured to control opening/closing timing of the first switch, the second switch, and the third switch.

5. The electronic device of claim 4 , wherein the processor is configured to close the first switch, close the second switch, and open the third switch when the data is transmitted at a specified interval.

6. The electronic device of claim 4 , wherein the processor is configured to open the first switch, open the second switch, and close the third switch when a voltage outside of a specified voltage range is sensed by the USB connector.

7. The electronic device of claim 4 , wherein the processor is configured to close the first switch, close the second switch, and open the third switch when a voltage level of the USB connector remains within a specified range after the first circuit portion and the second circuit portion are connected to each other.

8. The electronic device of claim 1 , wherein the first impedance is a pull-up resistor connected to the voltage source,

wherein the second impedance is a pull-down resistor connected to the ground portion.

9. The electronic device of claim 1 , wherein the processor is configured to determine that the connection between the USB connector and the USB plug is released when a voltage level of the USB connector changes by a specified value or greater after the first circuit portion and the second circuit portion are connected to each other.

10. The electronic device of claim 1 , wherein the processor is configured to output a monitoring signal for determining whether the USB plug is connected at a point in time when the first section of the first frame starts.

11. The electronic device of claim 10 , wherein the processor is configured to determine whether the USB plug is connected in the first section of the first frame, and then, transmit the data to the external device after determining whether the USB plug is connected.

12. The electronic device of claim 11 , wherein the processor is configured to output a disconnection sensing signal having a voltage level higher than a voltage level of the monitoring signal in the at least a portion of the second section.

13. The electronic device of claim 12 , wherein the voltage level of the disconnection sensing signal is the same as a voltage level of a signal of a USB full speed mode.

14. The electronic device of claim 12 , wherein the processor is configured to output the disconnection sensing signal periodically at a period having a length equal to or greater than the first frame.

15. The electronic device of claim 14 , wherein the period is equal to or greater than a period of a USB full speed mode.

16. A method for sensing disconnection of an electronic device, comprising:

monitoring an external device using a high speed interface with a first impedance in a first section of a first frame;

transmitting and/or receiving data to and/or from the external device using the high speed interface in the first section;

connecting a first circuit portion having a second impedance higher than the first impedance to a second circuit portion of the external device so as to form a disconnection sensing path in at least a portion of a second section other than the first section in the first frame; and

determining whether a connection between a USB connector and a USB plug is released using the disconnection sensing path,

wherein the second circuit portion has a fourth impedance higher than a third impedance of an external high speed interface of the external device.

17. The method of claim 16 , wherein the determining further comprises:

determining that the connection between the USB connector and the USB plug is released when a voltage level of the USB connector changes by a specified value or greater after the first circuit portion and the second circuit portion are connected to each other.

18. The method of claim 16 , wherein the monitoring further comprises:

outputting a monitoring signal for determining whether the USB plug is connected at a point int time when the first section of the first frame starts.

19. The method of claim 18 , wherein the transmitting and/or receiving the data further comprises:

determining whether the USB plug is connected in the first section of the first frame; and

transmitting the data to the external device after determining whether the USB plug is connected.

20. The method of claim 19 , further comprising:

outputting a disconnection sensing signal having a voltage level higher than a voltage level of the monitoring signal in the at least a portion of the second section.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2022
From: LEE, JAEHWAN; LIM, HOYEONG; CHUNG, CHEOLYOON; KIM, HYUNSEOK; BAEK, INCHEOL; YI, YONGSEUNG
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 061453/0392 →
Priority Claims (1)
KR 10-2020-0047698 · Apr 20, 2020 · national
Continuity (2)
Continuation PCTKR2021004337 · Apr 7, 2021
Related Publication 20230044807A1 · Feb 9, 2023
References Cited (50)
US 6417776B1 · Tagishi · 2002 [cited by examiner]
US 8352644B2 · Malamant et al. · 2013 [cited by applicant]
US 8626980B2 · Foster · 2014 [cited by applicant]
US 8667316B2 · Foster · 2014 [cited by applicant]
US 8683091B2 · Chen · 2014 [cited by examiner]
US 8775692B2 · Manabe · 2014 [cited by applicant]
US 8935441B2 · Manabe · 2015 [cited by applicant]
US 9606955B2 · Chen et al. · 2017 [cited by applicant]
US 9727105B2 · Lee et al. · 2017 [cited by applicant]
US 9740643B2 · Singh · 2017 [cited by applicant]
US 10198386B2 · Rand et al. · 2019 [cited by applicant]
US 10489324B2 · Sporck et al. · 2019 [cited by applicant]
US 10949376B2 · Lee et al. · 2021 [cited by applicant]
US 11038547B2 · Lee et al. · 2021 [cited by applicant]
US 20020169915A1 · Wu · 2002 [cited by examiner]
US 20070028127A1 · Kim · 2007 [cited by examiner]
US 20100235655A1 · Tauscher · 2010 [cited by examiner]
US 20120059965A1 · Foster · 2012 [cited by applicant]
US 20120324302A1 · Arslan et al. · 2012 [cited by applicant]
US 20130179603A1 · Tu · 2013 [cited by examiner]
US 20130198417A1 · Takashima · 2013 [cited by applicant]
US 20130286523A1 · Mullins · 2013 [cited by examiner]
US 20140211862A1 · Moghe et al. · 2014 [cited by applicant]
US 20160028252A1 · Bajpai · 2016 [cited by examiner]
US 20170047749A1 · Cornelius · 2017 [cited by examiner]
US 20180097395A1 · Yoshida · 2018 [cited by examiner]
US 20190065422A1 · Sporck et al. · 2019 [cited by applicant]
US 20190220430A1 · Rand et al. · 2019 [cited by applicant]
US 20190303330A1 · Kagaya · 2019 [cited by examiner]
US 20190341786A1 · Lee et al. · 2019 [cited by applicant]
US 20200250122A1 · Kagaya · 2020 [cited by examiner]
US 20200285601A1 · Lee et al. · 2020 [cited by applicant]
US 20200313715A1 · Lee et al. · 2020 [cited by applicant]
US 20200403433A1 · Lee et al. · 2020 [cited by applicant]
JP 2010287035A · 2010 [cited by applicant]
JP 2014522961A · 2014 [cited by applicant]
JP 5628338B2 · 2014 [cited by applicant]
JP 5930025B2 · 2016 [cited by applicant]
JP 5963445B2 · 2016 [cited by applicant]
KR 100321761B1 · 2002 [cited by applicant]
KR 1020150006123A · 2015 [cited by applicant]
KR 101537560B1 · 2015 [cited by applicant]
KR 101638760B1 · 2016 [cited by applicant]
KR 101646959B1 · 2016 [cited by applicant]
KR 1020170098100A · 2017 [cited by applicant]
KR 1020170120611A · 2017 [cited by applicant]
KR 1020180013099A · 2018 [cited by applicant]
KR 1020180092691A · 2018 [cited by applicant]
KR 1020190044895A · 2019 [cited by applicant]
KR 1020190061858A · 2019 [cited by applicant]