IP Library Granted Patent US 12,342,572
Granted Patent B2
US 12,342,572 · App. 17/903,894 · Granted Jun 24, 2025

Semiconductor device

Inventor: Tatsuya Shiraishi (Nonoichi Ishikawa, JP)
Assignees: Kabushiki Kaisha Toshiba; Toshiba Electronic Devices & Storage Corporation
H10D30/668H10D64/117H10D64/513H10D64/516
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,342,572
App. No.
17/903,894
Granted
Jun 24, 2025
Kind
B2
Abstract

A semiconductor device of an embodiment includes a first electrode, a first semiconductor layer of first conductivity type provided on the first electrode; a second semiconductor layer of first conductivity type provided on the first semiconductor layer; a first semiconductor region of second conductivity type provided on the second semiconductor layer; a first insulating film provided in a trench reaching the second semiconductor layer from above the first semiconductor region, a dielectric constant of an upper part of the first insulating film being higher than a dielectric constant of a lower part of the first insulating film; a second electrode provided in the trench, the second electrode facing the first semiconductor region; and a second insulating film provided between the second electrode and the first semiconductor region, the second insulating film being provided on the first insulating film in the trench.

Claims (49)

1. A semiconductor device comprising:

a first electrode,

a first semiconductor layer of first conductivity type provided on the first electrode;

a second semiconductor layer of first conductivity type provided on the first semiconductor layer;

a first semiconductor region of second conductivity type provided on the second semiconductor layer;

a first insulating film provided in a trench reaching the second semiconductor layer from above the first semiconductor region, a dielectric constant of an upper part of the first insulating film being higher than a dielectric constant of a lower part of the first insulating film;

a second electrode provided in the trench, the second electrode facing the first semiconductor region;

a second insulating film provided between the second electrode and the first semiconductor region, the second insulating film being provided on the first insulating film in the trench;

a second semiconductor region of first conductivity type provided on the first semiconductor region;

an interlayer insulating film provided on the second electrode; and

a third electrode provided on the interlayer insulating film, the third electrode being electrically connected to the second semiconductor region.

2. The semiconductor device according to claim 1 ,

wherein the first insulating film includes a first insulating portion, and the first insulating portion is a silicon oxide film.

3. The semiconductor device according to claim 2 ,

wherein the first insulating portion is provided at the lowest part of the trench.

4. The semiconductor device according to claim 2 ,

wherein the first insulating film includes a fifth insulating portion provided on the first insulating portion, and the fifth insulating portion is a silicon nitride film.

5. The semiconductor device according to claim 4 ,

wherein the second electrode is in direct contact with the fifth insulating portion.

6. The semiconductor device according to claim 5 ,

wherein the first insulating film further includes a second insulating portion provided between the first insulating portion and the fifth insulating portion, and the second insulating portion is a SiON film.

7. The semiconductor device according to claim 6 ,

wherein the first insulating film further includes

a third insulating portion provided between the second insulating portion and the fifth insulating portion, the third insulating portion is a SiON film, and a nitrogen concentration of the third insulating portion is higher than a nitrogen concentration of the second insulating portion, and

a fourth insulating portion provided between the third insulating portion and the fifth insulating portion, the fourth insulating portion is a SiON film, and a nitrogen concentration of the fourth insulating portion is higher than the nitrogen concentration of the third insulating portion.

8. The semiconductor device according to claim 1 ,

wherein the first insulating film includes a first insulating portion, and the first insulating portion is a SiOF film.

9. The semiconductor device according to claim 8 ,

wherein the first insulating portion is provided at the lowest part of the trench.

10. The semiconductor device according to claim 8 ,

wherein the first insulating film includes a fifth insulating portion provided on the first insulating portion, and the fifth insulating portion is a silicon nitride film.

11. The semiconductor device according to claim 10 ,

wherein the second electrode is in direct contact with the fifth insulating portion.

12. The semiconductor device according to claim 11 ,

wherein the first insulating film further includes a second insulating portion provided between the first insulating portion and the fifth insulating portion, and the second insulating portion is a SiON film.

13. The semiconductor device according to claim 6 ,

wherein the first insulating film further includes

a third insulating portion provided between the second insulating portion and the fifth insulating portion, the third insulating portion is a SiON film, and a nitrogen concentration of the third insulating portion is higher than a nitrogen concentration of the second insulating portion, and

a fourth insulating portion provided between the third insulating portion and the fifth insulating portion, the fourth insulating portion is a SiON film, and a nitrogen concentration of the fourth insulating portion is higher than the nitrogen concentration of the third insulating portion.

14. The semiconductor device according to claim 1 ,

wherein the second insulating film is a silicon oxide film.

15. The semiconductor device according to claim 1 , further comprising:

a third insulating film provided between the first insulating film and the second semiconductor layer, and the third insulating film being provided in the trench.

16. The semiconductor device according to claim 1 , further comprising:

a field plate electrode provided in the first insulating film, and the field plate electrode being provided in the trench.

17. The semiconductor device according to claim 6 , further comprising:

a field plate electrode provided in the first insulating film, and the field plate electrode being provided in the trench.

18. The semiconductor device according to claim 12 , further comprising:

a field plate electrode provided in the first insulating film, and the field plate electrode being provided in the trench.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2022
From: SHIRAISHI, TATSUYA
To: KABUSHIKI KAISHA TOSHIBA; TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Reel/Frame 062154/0273 →
Priority Claims (1)
JP 2022-045399 · Mar 22, 2022 · national
Continuity (1)
Related Publication 20230307537A1 · Sep 28, 2023
References Cited (15)
US 8981470B2 · Nozu · 2015 [cited by applicant]
US 20140209999A1 · Sato et al. · 2014 [cited by applicant]
US 20170263767A1 · Nishiwaki · 2017 [cited by applicant]
US 20180097061A1 · Mimura et al. · 2018 [cited by applicant]
US 20190189756A1 · Okumura · 2019 [cited by applicant]
US 20210296454A1 · Fujino · 2021 [cited by examiner]
US 20210296490A1 · Shiraishi · 2021 [cited by examiner]
JP 2010129973A · 2010 [cited by applicant]
JP 2014060298A · 2014 [cited by applicant]
JP 2014146666A · 2014 [cited by applicant]
JP 2016181617A · 2016 [cited by applicant]
JP 2017162909A · 2017 [cited by applicant]
JP 2019106507A · 2019 [cited by applicant]
JP 2021150401A · 2021 [cited by applicant]
Office Action issued in Japanese Patent Application No. 2022-045399 dated Mar. 4, 2025 in 12 pages. [cited by applicant]