IP Library Granted Patent US 12,347,646
Granted Patent B2
US 12,347,646 · App. 17/314,871 · Granted Jul 1, 2025

Plasma processing apparatus

Inventors: Bongseong Kim (Miyagi, JP); Masahiro Inoue (Miyagi, JP); Mitsunori Ohata (Miyagi, JP); Ken Kobayashi (Miyagi, JP)
Assignee: TOKYO ELECTRON LIMITED
H01J37/32146H01J37/32018H01J37/3211H01J37/32137H01J37/32165H01J37/32715H01L21/3065H01J2237/334
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Quick Facts
Patent No.
US 12,347,646
App. No.
17/314,871
Granted
Jul 1, 2025
Kind
B2
Abstract

A plasma processing apparatus includes a plasma processing chamber, a substrate support, a source RF generator, and a bias RF generator. The substrate support is disposed within the plasma processing chamber. The source RF generator is configured to generate a source RF signal. The source RF signal includes source cycles, and each of the source cycles includes a source ON state and a source OFF state. The source ON state has at least two source power levels. The bias RF generator is coupled to the substrate support and configured to generate a bias RF signal. The bias RF signal includes bias cycles corresponding to the source cycles, respectively. Each of the bias cycles includes a bias ON state and a bias OFF state. The bias ON state has at least two bias power levels.

Claims (9)

1. A plasma processing apparatus comprising:

a controller;

a plasma processing chamber;

a substrate support disposed within the plasma processing chamber;

a source RF generator coupled to the plasma processing chamber, and the controller is configured to control the source RF generator to generate a source RF signal having a first source power level greater than 0 during a first period at each cycle, a second source power level different from the first source power level and greater than 0 during a second period subsequent to the first period at each cycle, the second source power level during a third period subsequent to the second period at each cycle, and a zero power level during a fourth period subsequent to the third period at each cycle; and

a bias RF generator coupled to the substrate support, and the controller is configured to control the bias RF generator to generate a bias RF signal having a zero power level during the first period, the zero power level during a delay time at the second period, a first bias power level greater than 0 during the second period excluding the delay time, a second bias power level different from the first bias power level and greater than 0 during the third period, the zero power level during the fourth period.

2. The plasma processing apparatus according to claim 1 , wherein the second source power level is lower than the first source power level.

3. The plasma processing apparatus according to claim 1 , wherein the second bias power level is lower than the first bias power level.

4. The plasma processing apparatus according to claim 1 , wherein the delay time starts at a transition from the first source power level to the second source power level and ends at a start of the first bias power level.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2021
From: KIM, BONGSEONG; INOUE, MASAHIRO; OHATA, MITSUNORI; KOBAYASHI, KEN
To: TOKYO ELECTRON LIMITED
Reel/Frame 056174/0896 →
Priority Claims (2)
JP 2020-085141 · May 14, 2020 · national
JP 2021-012816 · Jan 29, 2021 · national
Continuity (1)
Related Publication 20210358717A1 · Nov 18, 2021
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