IP Library Granted Patent US 12,347,766
Granted Patent B2
US 12,347,766 · App. 17/590,293 · Granted Jul 1, 2025

Semiconductor structure and method for forming the same

Inventor: Hao-Chuan Chang (Taichung, TW)
Assignee: WINBOND ELECTRONICS CORP.
H01L23/5226H01L21/76802H01L21/76877H01L23/53266H01L23/53271H01L23/5329H10B12/482
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Quick Facts
Patent No.
US 12,347,766
App. No.
17/590,293
Granted
Jul 1, 2025
Kind
B2
Abstract

A semiconductor structure and a method for forming the same are provided. A semiconductor structure includes a substrate, a bit line structure, a first conductive pillar, an interface layer, a second conductive pillar, and an intermediate structure. The substrate has an active area and an isolation structure. The bit line structure is disposed on the active area. The first conductive pillar is disposed on the active area. The interface layer is disposed on a top surface of the first conductive pillar. The second conductive pillar is disposed on the interface layer. The intermediate structure is disposed between the first conductive pillar and the bit line structure.

Claims (19)

1. A semiconductor structure, comprising:

a substrate having an active area and an isolation structure;

a bit line structure disposed on the active area;

a first conductive pillar disposed on the active area;

an interface layer disposed on a top surface of the first conductive pillar;

a second conductive pillar disposed on the interface layer; and

an intermediate structure disposed between the first conductive pillar and the bit line structure,

wherein the interface layer completely covers a top surface of the first conductive pillar.

2. The semiconductor structure as claimed in claim 1 , wherein a bottom surface of the first conductive pillar is lower than a bottom surface of the intermediate structure.

3. The semiconductor structure as claimed in claim 1 , wherein the interface layer has an extending portion, and the extending portion is disposed on a side surface of the first conductive pillar.

4. The semiconductor structure as claimed in claim 3 , wherein the extending portion is between the first conductive pillar and the intermediate structure.

5. The semiconductor structure as claimed in claim 1 , wherein a top surface of the interface layer is level with a top surface of the intermediate structure.

6. The semiconductor structure as claimed in claim 1 , wherein the intermediate structure further comprises:

an intermediate component disposed below the second conductive pillar; and

an air gap disposed below the intermediate component.

7. The semiconductor structure as claimed in claim 6 , wherein the intermediate component is in contact with the interface layer, the second conductive pillar, and the air gap.

8. The semiconductor structure as claimed in claim 1 , wherein the intermediate structure is an air gap.

9. The semiconductor structure as claimed in claim 1 , wherein the intermediate structure is in contact with the first conductive pillar, the interface layer, and the second conductive pillar.

10. The semiconductor structure as claimed in claim 1 , wherein the first conductive pillar comprises polycrystalline silicon, the interface layer comprises cobalt silicide, and the second conductive pillar comprises tungsten.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 8, 2022
From: CHANG, HAO-CHUAN
To: WINBOND ELECTRONICS CORP.
Reel/Frame 058925/0398 →
Continuity (1)
Related Publication 20230275017A1 · Aug 31, 2023
References Cited (4)
US 9548260B2 · Park et al. · 2017 [cited by applicant]
US 11037930B2 · Park et al. · 2021 [cited by applicant]
US 20200388620A1 · Park · 2020 [cited by examiner]
TW I718077B · 2021 [cited by applicant]