Semiconductor device and method for fabricating the same

1. A semiconductor device, comprising:

a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate;

a first top electrode on the first MTJ and a second top electrode on the second MTJ;

a first spacer and a second spacer around the first MTJ, wherein top surfaces of the first spacer, the second spacer, and the first top electrode are coplanar;

a third spacer and a fourth spacer around the second MTJ;

a passivation layer between the second spacer and the third spacer and filling a space between the first MTJ and the second MTJ completely, wherein a top surface of the passivation layer comprises a V-shape surface, and the V-shape surface directly connecting and extending from the top surface of the first spacer; and

an ultra low-k (ULK) dielectric layer on the passivation layer and around the first MTJ and the second MTJ.

2. The semiconductor device of claim 1 , further comprising:

an inter-metal dielectric (IMD) layer on the substrate;

a first metal interconnection and a second metal interconnection in the IMD layer; and

the first MTJ on the first metal interconnection and the second MTJ on the second metal interconnection.

3. The semiconductor device of claim 1 , wherein the passivation layer contacts the second spacer directly.

4. The semiconductor device of claim 1 , wherein the passivation layer contacts the third spacer directly.

5. The semiconductor device of claim 1 , wherein the passivation layer between the second spacer and the third spacer contacts the IMD layer directly.

6. The semiconductor device of claim 1 , wherein the ULK dielectric layer contacts a top surface of the first top electrode directly.

7. The semiconductor device of claim 1 , wherein an angle of the V-shape is greater than 100 degrees.