IP Library › Granted Patent US 12,349,540
Granted Patent B2
US 12,349,540 · App. 17/428,621 · Granted Jul 1, 2025

Display substrate and manufacturing method thereof, and display apparatus

Inventors: Xin Cao (Beijing, CN); Yawei Zhu (Beijing, CN); Heungsik Kim (Beijing, CN); Zifeng Wang (Beijing, CN); Haoyuan Fan (Beijing, CN)
Assignees: MIANYANG BOE OPTOELECTRONICS TECHNOLOGY CO., Ltd.; BOE Technology Group Co., Ltd.
H10K59/1213H10D30/0321H10D30/6723H10D30/6729H10D30/6745H10D30/6755H10K59/1216H10K59/1795H10K59/8731H10K59/8792
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Quick Facts
Patent No.
US 12,349,540
App. No.
17/428,621
Granted
Jul 1, 2025
Kind
B2
Abstract

The present disclosure provides a display substrate, a manufacturing method thereof and a display apparatus. The display substrate includes a base substrate, an active structure layer disposed on the base substrate and a source-drain structure layer disposed on the active structure layer. The active structure layer includes a first active layer and a second active layer. A material of the first active layer includes low-temperature polysilicon and a material of the second active layer includes oxide semiconductors. The source-drain structure layer includes a first source-drain electrode and a second source-drain electrode, wherein the first source-drain electrode overlaps with a first side surface of the first active layer through a first via hole and the second source-drain electrode overlaps with a second side surface of the second active layer through a second via hole.

Claims (28)

1. A display substrate, comprising a base substrate, an active structure layer disposed on the base substrate and a source-drain structure layer disposed on the active structure layer, wherein:

the active structure layer comprises a first active layer and a second active layer, a material of the first active layer comprises low-temperature polysilicon and a material of the second active layer comprises oxide semiconductors; the source-drain structure layer comprises a first source-drain electrode and a second source-drain electrode, wherein the first source-drain electrode overlaps with a first side surface of the first active layer through a first via hole and the second source-drain electrode overlaps with a second side surface of the second active layer through a second via hole; the first side surface is a surface parallel to the base substrate, and the second side surface is a surface intersecting with the base substrate;

the active structure layer comprises: a fifth insulating layer covering the second active layer, a second gate electrode disposed on the fifth insulating layer, and a sixth insulating layer covering the second gate electrode;

the second via hole comprises a communication hole provided on the fifth insulating layer and the sixth insulating layer and a contact hole provided on the second active layer, the communication hole communicates with the contact hole, and the second source-drain electrode overlaps with the second side surface of the second active layer through the contact hole;

at an interface between the second active layer and the fifth insulating layer, a distance between boundaries of the contact hole at the interface is a first distance, and a distance between boundaries of the communication hole at the interface is a second distance, and the first distance is greater than the second distance; and

the first distance is 1.01 to 1.05 times the second distance.

2. The display substrate according to claim 1 , wherein the active structure layer further comprises: a first insulating layer disposed on the base substrate, the first active layer disposed on the first insulating layer, a second insulating layer covering the first active layer, a first gate electrode provided on the second insulating layer, a third insulating layer covering the first gate electrode, a light shield layer disposed on the third insulating layer, a fourth insulating layer covering the light shield layer, the second active layer disposed on the fourth insulating layer; wherein the second insulating layer, the third insulating layer, the fourth insulating layer, the fifth insulating layer and the sixth insulating layer in the first via hole are removed to make the first source-drain electrode overlap with the first side surface of the first active layer through the first via hole; the second active layer, the fifth insulating layer and the sixth insulating layer in the second via hole are removed to make the second source-drain electrode overlap with the second side surface of the second active layer through the second via hole.

3. The display substrate according to claim 1 , wherein at the interface between the second active layer and the fifth insulating layer, an orthographic projection of the contact hole at the interface on the base substrate comprises an orthographic projection of the communication hole at the interface on the base substrate.

4. The display substrate according to claim 1 , wherein the second source-drain electrode overlaps with a first side surface of the fifth insulating layer.

5. A display apparatus, comprising the display substrate according to claim 1 .

6. A method for manufacturing a display substrate, comprising:

forming an active structure layer on a base substrate, wherein the active structure layer comprises a first active layer and a second active layer, a material of the first active layer comprises low-temperature polysilicon and a material of the second active layer comprises oxide semiconductor; and

forming a source-drain structure layer on the active structure layer, wherein the source-drain structure layer comprises a first source-drain electrode and a second source-drain electrode, the first source-drain electrode overlaps with a first side surface of the first active layer through a first via hole and the second source-drain electrode overlaps with a second side surface of the second active layer through a second via hole; the first side surface is a surface parallel to the base substrate, and the second side surface is a surface intersecting with the substrate,

wherein the active structure layer comprises: a fifth insulating layer covering the second active layer, a second gate electrode disposed on the fifth insulating layer, and a sixth insulating layer covering the second gate electrode;

the second via hole comprises a communication hole provided on the fifth insulating layer and the sixth insulating layer and a contact hole provided on the second active layer, the communication hole communicates with the contact hole, and the second source-drain electrode overlaps with the second side surface of the second active layer through the contact hole;

at an interface between the second active layer and the fifth insulating layer, a distance between boundaries of the contact hole at the interface is a first distance, and a distance between boundaries of the communication hole at the interface is a second distance, and the first distance is greater than the second distance; and

the first distance is 1.01 to 1.05 times the second distance.

7. The method according to claim 6 , wherein forming the active structure layer on the base substrate comprises:

sequentially forming the active structure layer comprising the first active layer and the second active layer on the base substrate;

forming the first via hole and the communication hole through a patterning process, wherein the first via hole exposes the first side surface of the first active layer and the communication hole exposes a first side surface of the second active layer; and

etching the second active layer in the communication hole through a cleaning process to form the contact hole exposing the second side surface of the second active layer.

8. The method according to claim 6 , wherein forming the active structure layer on the base substrate comprises:

sequentially forming the active structure layer comprising the first active layer and the second active layer on the base substrate;

forming the communication hole through a patterning process, wherein the communication hole exposes a first side surface of the second active layer;

forming the first via hole through another patterning process, wherein the first via hole exposes the first side surface of the first active layer; and

etching the second active layer in the communication hole through a cleaning process to form the contact hole exposing the second side surface of the second active layer.

9. The method according to claim 7 , wherein at the interface between the second active layer and the fifth insulating layer, an orthographic projection of the contact hole at the interface on the base substrate comprises an orthographic projection of the communication hole at the interface on the base substrate.

10. The method according to claim 8 , wherein at the interface between the second active layer and the fifth insulating layer, an orthographic projection of the contact hole at the interface on the base substrate comprises an orthographic projection of the communication hole at the interface on the base substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 9, 2021
From: CAO, XIN; ZHU, YAWEI; KIM, HEUNGSIK; WANG, ZIFENG; FAN, HAOYUAN
To: MIANYANG BOE OPTOELECTRONICS TECHNOLOGY CO.,LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 057115/0781 →
Continuity (1)
Related Publication 20230139734A1 · May 4, 2023
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