Training and configuration of reference voltage generators in a multi-rank circuit system
The differential voltage output from a first reference voltage generator of a multi-rank circuit is trained on multiple ranks of the multi-rank circuit. Multiple local reference voltage generators are trained to generate reference voltages for communication on the individual ranks, where the reference voltages output by the local reference voltage generators fall within a range of the differential voltage output.
1. A training method for a multi-rank circuit, the method comprising:
training a differential voltage output of a global reference voltage generator on a plurality of ranks of the multi-rank circuit, the differential voltage output configured to comprise a first voltage greater than a reference ground potential and a second voltage greater than the low voltage;
training a plurality of local reference voltage generators individually on the ranks, within a range of the differential voltage output; and
wherein training the local reference voltage generators comprises selecting outputs from nodes of a voltage ladder coupled between an upper reference voltage line of the differential voltage output comprising the second voltage and a lower reference voltage line of the differential voltage output comprising the first voltage.
2. The method of claim 1 , wherein training the global reference voltage generator on the plurality of ranks comprises determining a reference voltage Vr that satisfies a timing window of the ranks.
3. The method of claim 2 , wherein the differential voltage output is determined by applying one or more predetermined increments to Vr.
4. The method of claim 1 , wherein the differential voltage output is determined by a first N>2 control bits and an output of one or more of the local reference voltage generators is determined by M>2 control bits, where M<N.
5. The method of claim 4 , wherein the differential voltage output is further determined by a second N control bits.
6. The method of claim 1 , wherein a plurality of multiplexers are each operated with M control bits to select the outputs from the nodes of the voltage ladder.
7. The method of claim 1 , further comprising:
applying outputs of the local reference voltage generators to different memory rank receivers.
8. A system comprising:
a number of ranks Y;
a global reference voltage generator configured to output a differential output voltage, the differential output voltage comprising a first voltage greater than a reference ground potential and a second voltage greater than the low voltage;
a number X of local reference voltage generators coupled to receive the differential output voltage of the global reference voltage generator, each of the local reference voltage generators configurable to output one of Y different reference voltages within the range of the differential output voltage;
logic to train the global reference voltage generator to output the differential voltage output based on a multi-bit input from a plurality of ranks coupled to the local reference voltage generators, and to train the local reference voltage generators on individual ranks; and
logic to train the local reference voltage generators by selecting outputs from nodes of a voltage ladder coupled between an upper reference voltage line comprising the second voltage and a lower reference voltage line comprising the first voltage.
9. The system of claim 8 , wherein the logic is configured to set a range of the differential voltage output to meet a timing margin of the local reference voltage generators.
10. The system of claim 9 , wherein the logic is configured to set outputs of each of the local reference voltage generators to maximize timing margin for a corresponding one of the individual ranks.
11. The system of claim 8 , wherein two or more of the local reference voltage generators select their outputs from a common voltage ladder.
12. The system of claim 11 , the voltage ladder receiving the differential output voltage.
13. The system of claim 8 , at least some of the local reference voltage generators co-located, on a die for the circuit, with an input/output circuit to which they provide a reference voltage.
14. A method comprising:
training a first reference voltage generator to output a differential voltage comprising a first voltage greater than a reference ground potential and a second voltage greater than the low voltage;
training each of a plurality of second reference voltage generators to output reference voltages within a range of the differential voltage, the reference voltages each centered in a signaling eye of a different rank of a multi-rank circuit;
wherein training the first reference voltage generator to output the differential voltage comprises:
training the first reference voltage generator on a plurality of circuit ranks and determining a reference voltage V, that satisfies a timing window of the ranks; and
adding and subtracting one or more predetermined increments from the reference voltage V r to generate a high voltage of the differential voltage and a low voltage of the differential voltage, respectively.
15. The method of claim 14 , further comprising:
dividing the differential voltage into a plurality of available reference voltages; and
training each of the second reference voltage generators to select an output voltage from one of the available reference voltages.
16. The method of claim 15 , further comprising:
training the differential voltage with a first resolution; and
dividing the differential voltage into a plurality of available reference voltages with a second resolution greater than the first resolution.
17. The method of claim 14 , further comprising:
applying each output of the plurality of second reference voltage generators to a memory rank IO circuit.
18. A method comprising:
training a first reference voltage generator to output a differential voltage;
training each of a plurality of second reference voltage generators to output reference voltages within a range of the differential voltage, the reference voltages each centered in a signaling eye of a different rank of a multi-rank circuit;
wherein training the first reference voltage generator to output the differential voltage comprises:
training the first reference voltage generator on a plurality of circuit ranks and determining a reference voltage V r that satisfies a timing window of the ranks; and
adding and subtracting one or more predetermined increments from the reference voltage V r to generate a high voltage of the differential voltage and a low voltage of the differential voltage, respectively.