IP Library › Granted Patent US 12,355,013
Granted Patent B2
US 12,355,013 · App. 17/726,072 · Granted Jul 8, 2025

Emission height arrangements in light-emitting diode packages and related devices and methods

Inventors: Alexis Rile (Durham, NC); Robert Wilcox (Rolesville, NC); Colin Blakely (Raleigh, NC)
Assignee: CreeLED, Inc.
H01L25/0753H10H20/01H10H20/84H10H20/034
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Quick Facts
Patent No.
US 12,355,013
App. No.
17/726,072
Granted
Jul 8, 2025
Kind
B2
Abstract

Light-emitting diode (LED) packages and more particularly emission height arrangements in LED packages and related devices and methods are disclosed. LED packages, LED chips, and related device arrangements are disclosed that include various combinations of LED chip types, lumiphoric materials, and/or cover structures that are arranged together while also providing a substantially uniform emission height for corresponding light-emitting surfaces. LED chips may be configured with different heights or thicknesses that compensate for variations in lumiphoric materials and/or cover structures utilized to provide different emission colors. Corresponding LED packages and/or LED chips with different emission colors may be assembled near one another with improved emission height uniformity.

Claims (21)

1. A method comprising:

providing a first light-emitting diode (LED) chip and a first lumiphoric material layer that define a first color point;

providing a second LED chip that defines a second color point that is different than the first color point; and

reducing a thickness of at least one of the first LED chip and the second LED chip such that a first emission height formed by the first LED chip and the first lumiphoric material layer is within 100 microns (μm) of a second emission height of the second LED chip.

2. The method of claim 1 , wherein the first emission height is defined as a perpendicular distance from a mounting surface of the first LED chip to a topmost emission surface of the first LED chip, and the second emission height is defined as a perpendicular distance from a mounting surface of the second LED chip to a topmost emission surface of the second LED chip.

3. The method of claim 2 , wherein the topmost emission surface of the first LED chip is defined at a topmost surface of the first lumiphoric material layer and the topmost emission surface of the second LED chip is defined at a topmost surface of the second LED chip.

4. The method of claim 1 , wherein the thickness of the first LED chip is reduced by an amount that corresponds with a thickness of the first lumiphoric material layer.

5. The method of claim 1 , wherein reducing a thickness of at least one of the first LED chip and the second LED chip comprises reducing a thickness of a substrate of at least one of the first LED chip and the second LED chip.

6. The method of claim 1 , wherein the first emission height is within 60 μm of the second emission height.

7. The method of claim 1 , wherein the first emission height is within 30 μm of the second emission height.

8. The method of claim 1 , wherein the first LED chip is on a first submount, and the second LED chip is on a second submount that has a same height as the first submount.

9. A method comprising:

providing a first light-emitting diode (LED) chip and a first lumiphoric material layer that define a first color point;

providing a second LED chip and a second lumiphoric material layer that define a second color point that is different than the first color point; and

reducing a thickness of at least one of the first LED chip and the second LED chip such that a first emission height formed by the first LED chip and the first lumiphoric material layer is within 100 microns (μm) of a second emission height formed by the second LED chip and the second lumiphoric material layer.

10. The method of claim 9 , wherein the first emission height is defined as a perpendicular distance from a mounting surface of the first LED chip to a topmost emission surface of the first LED chip, and the second emission height is defined as a perpendicular distance from a mounting surface of the second LED chip to a topmost emission surface of the second LED chip.

11. The method of claim 10 , wherein the topmost emission surface of the first LED chip is defined at a topmost surface of the first lumiphoric material layer and the topmost emission surface of the second LED chip is defined at a topmost surface of the second lumiphoric material layer.

12. The method of claim 9 , wherein reducing a thickness of at least one of the first LED chip and the second LED chip comprises reducing a thickness of a substrate of at least one of the first LED chip and the second LED chip.

13. The method of claim 9 , wherein the first emission height is within 60 μm of the second emission height.

14. The method of claim 9 , wherein the first emission height is within 30 μm of the second emission height.

15. The method of claim 9 , wherein the first LED chip and the second LED chip are on a same mounting surface of a submount.

Assignments (2)
PATENT SECURITY AGREEMENT Recorded Jun 30, 2025
From: CREELED, INC.; PENGUIN SOLUTIONS CORPORATION (DE); SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; SMART MODULAR TECHNOLOGIES, INC.; PENGUIN COMPUTING, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 071755/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2022
From: RILE, ALEXIS; WILCOX, ROBERT; BLAKELY, COLIN
To: CREELED, INC.
Reel/Frame 059668/0677 →
Continuity (1)
Related Publication 20230343757A1 · Oct 26, 2023
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